A new DNA computing model for the NAND gate based on induced hairpin formation 생물정보학 협동과정 소 영 제

Termination of transcription The hairpin structure serves as a stop signal for transcription The DNA template mRNA, and polymerase then go their separate ways

Hairpin Structure These “self-complementary” sequences allow the formation of a HAIRPIN or STEM and LOOP Structure

Boolean circuits x1x2NAND The input and output of logical NAND gate A Boolean circuit representing the Boolean function

Theoretical model of the NAND gate 1 0 NAND :

Encoding requirement on the NAND gate Two subsequence x1 and x2 of length l Two partially complementary sequences of length m which contain some GG mismatches as in To separate sequence to surface Chemically modified surface

Step 1 to simulate the NAND gate base on hairpin Input variable xi (i=1,2) 1 is complementary strands They are anneal with correspondent subsequence of the gate strands

Step 2 to simulate the NAND gate base on hairpin x1x2NAND Adding naphthyridine dimer to surface This will induce the hairpin formation for some of the gate strand Naphtyridine dimer

Step 3 to simulate the NAND gate base on hairpin Washing the surface with distilled water so that the naphtyridine dimer is completely removed After this the gate strands in hairpin structure will become single stranded while the double strands remain unchanged

Step 4 to simulate the NAND gate base on hairpin Adding the output strands z and the complementary strands 5’-x2-s-z-3’ to the surface Then ligase is added to seal the nick between the the gate strand and the output strand. Output strand z at the end of these gate strands whose output is “1”, while those whose output is “0” remain unchanged 5’-CCAA | TTG-3’ Endonuclease Hpa

Final step to simulate the NAND gate base on hairpin After clearing, adding enzyme Hpa I to the surface -> to cut output z Collecting these strands z Purifying them and prepared for the input of the next gate to get The gate’s output(SPR) Construct Boolean circuit network with such kind of NAND gates. Because there are so many gates at each level, it is impractical to add their outputs one by one, for otherwise the circuit’s parallelism would be greatly reduced

Conclusion This paper presented a theoretical model of the NAND gate through the induced hairpin formation (only six steps needed) The time consumption will increase linearly with the level number of network, nothing to do with the total number of logical gates NAND gate to be reusable for repeated cycles of computation This model may be expected to perform the computation with higher reliability as the hairpin formation has high specific hybridization ability. This model can be easily incorporated with the next generation of DNA chip to form a combinatorial computing network