Proposal for Emerging Logic Device workshop 2012 George Bourianoff, Intel December 4, 2011 Washington DC.

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Proposal for Emerging Logic Device workshop 2012 George Bourianoff, Intel December 4, 2011 Washington DC

Background ITRS rewritten on a 2 year cycle –Information gathering workshops and chapter writing done on alternate years –2012 will be devoted to workshops –Previous Emerging Logic Workshop was held in Seville, Spain in 2010 –It was organized as a topical meeting associated with ESSDERC

Proposal Organize the meeting in conjunction with the 2012 ESSDERC meeting – Bordeaux, France, Sept ?? 2012 Seek funding from NSF to help defray costs

Meeting objectives Review significant new research trends and results Review regional benchmarking results and highlight differences Discuss 2011 ERD Logic Table structure and en tries Discuss potential writing assignments