1. ERD Logic Section for 2009 ITRS Logic Workshop San Francisco, Ca. Dec 14, 2008 George Bourianoff facilitating

2. Agenda Determine content for 2009 ERD logic section – Section structure – Transition table – Table 1 – “CMOS Extension” – Table 2 – “Beyond CMOS” – Potential solutions table – Determine Technology Entries (TEs) for 2009 – Determine transition table entries for 2009 – Solicit writing volunteers for 2009 Add Potential Solutions table for Carbon Based Electronics Discuss linkage to materials and architecture sections – How can we improve the integration? (better links to key materials properties table, …) Approximate timeline for 2009

3. Proposed Chapter Structure Transition table - same structure 2007 Table 1 - “CMOS Extension” –Include (devices with FET functionality) Low dimensional structures III-V and Ge channel replacement structures Carbon-based material channel replacement structures BTBT devices ? ??????

4. Proposed Chapter structure (Cont) Table 2 “Beyond CMOS” devices –Category A “Digital Functionality” Spin Devices NEMS switches Atomic and molecular switches ????? –Category B “Non Digital Functionality” Spin devices Multi-ferroic devices Molecular devices ???

5. Proposed Chapter structure (Cont) Proposed solution table for carbon based Nanoelectronics

6. Discussion of Section Structure Transition table –discussion CMOS extension Table –discussion Beyond CMOS Table –Discussion Potential solution table Architectural linkage paragraph

7. High performance logic table 2007

8. Table 1 Proposed changes – “High Performance” >”CMOS Extension” Low dimensional structures :Carbon Nanotube FETs, nanowire FETs, Nanowire heterostructures, GNR FETS. High mobility channel replacement FETs including III-V and Ge Single electron devices - Move to table 2 Molecular devices including atomic switches- focus on molecule on CMOS architecture (CMOL) concept - Move to table 2 Ferromagnetic and coherent spin devices – Move to table 2 Add Band to Band Tunneling Devices ??

9. Proposed CMOS Extension Entries Low dimensional structures (nanowires) III-V and Ge channel replacement structures Carbon-based material channel replacement structures (CNT and GNR) BTBT devices ? ??????

10. 2007 Alternative Device Table

11. Table 2 proposed changes “Alternative Information Processing” > “ Beyond CMOS” Resonant Tunneling Diodes – Move to transition table Digital Functionality –Multi-ferroic devices –Spin devices –Single Electron devices Non digital functionality –Molecular Devices – CMOL –Bi-layer graphene devices –MQCA –Frequency Coherent Spin Devices –RF devices Do we want to include some “architecture driven” device?

12. Proposed “Beyond CMOS” entries Category A “Digital Functionality” –Spin Devices –NEMS switches –Atomic and molecular switches –????? Category B “Non Digital Functionality” –Spin devices –Multi-ferroic devices –Molecular devices –???

13. 2007 Transition table

14. 2009 Transition table proposed TechnologyStatusReasonComment RTDoutNo viable logic functionality Has been tracked for multiple revisions Bi-layer tunneling devices InSignificant theoretical work in NRI Band to band tunneling devices In NEMSIn RSFQPossible future device

15. New topics for discussion –Should we broaden the “CMOS extension” table to include Low Power” and “Low Standby Power” entries? –Pros Would align better with ITRS System Drivers Would reflect motivation of much research –Con Would significantly complicate chapter organization Would be orthogonal to the historical “tracking” function of the Table

16. Technology Entries(1) FET extensions –Low dimension Channel replacement category CNTFETS and Nanowire FETS Discuss CNTFETs with PIDs –High mobility channel replacements Send III-V and Ge to PIDs Graphene Nanoribbon devices

17. SETs Move to Table 2 –Some recent work still suggests logic applications –Emphasize non logic applications (recognition) –SETs have been around for a long time –Stray charge will always be problem Nature of Nanotechnology advance online

18. Molecular devices Move to table 2 Emphasize potential applications in crossbar architectures, CMOL Recent progress will be reviewed Some people believe strongly that the technology has great potential

19. Ferromagnetic and spin transistor Merge categories and move to table 2 Emphasize non volatile functionality Include MQCA and domain wall applications STTRAM research is driving progress in materials and process

20. Band to band tunneling devices Include as a category in table 1 ??? Include other steep SS devices Most devices suffer from low I sat or high V d CNT tunnel FETs

21. Resonant Tunnel Diodes Recommend moving to transition table Pros –Not much recent progress for any logic application Cons –It is an interesting device with NDR –Many people feel strongly about it

22. Multiferroic and magnetoelectric devices Include multiferroic tunnel junctions, magnetoelectric amplifiers, magnetoelectric drivers and detectors Significant progress in RT mutiferroic and magnetoelectric materials e.g. BFO

23. Single Electron devices Remove from table 1 -keep in table 2 –Active research for Boolean applications quantum dots –Potential Non Boolean logic applications such as image recognition still receiving attention –Stray charge still an issue

24. Potential solution table for carbon based nanoelectronics Build on ITRS “potential solution” format Separate into material driven requirements and novel device driven requirements Tie closely and directly to ERM

25. ERM table of applications

26. Proposed structure - table 1

27. Proposed structure –table 2

29. Coupling to ERM

32. Writing volunteers People or groups to research and write text for one or more of the technology entries –Need informed but unbiased contributors

33. 33 2. More Than Moore Bulk FD-SOI Strain Si 3D Year Ge （ 110 ） Ballistic GOI S-S/D CNT GNR 20052035? Variations DFMHigh yield Nanowire 2020? High-k/metal-G CMOS-based Charge-based Other than charges III-V 1. More Moore 3. Beyond CMOS Should we include Future Integrated Nanoelectronics chart? Spin Atom molecular Nanowire (CMOS Extension) Top-downBottom-up Optical Int. Sub-60mV/dec Main stream Si Fusion, No boundary Algorithm ERD Working group Japan

34. 34 year Beyond CMOS Elements ERD-WG in Japan Existing technologies New technologies Evolution of Extended CMOS CNT III-V Sub-60 Opt. Int. Spin Atom

35. Work in Progress --- Not for Publication 35 ERD WG 12/06/08 & 12/14/08 2009 ITRS/ERD Major Deliverables and Timeline ERD Chapter due August 21, 2009 Major Tasks and Time Line  Outlines for Memory, Logic, Architecture, Mat’lMarch 18  Technology Requirements TablesApril 6  Guiding Principles Section June 1  Draft Text Completed  Memory, Logic, Architecture, MaterialJuly 6  Functional Organization & Critical ReviewJuly 20  Scope, Difficult Challenges, etc.July 27  Chapter CompletedAugust 21  Chapter FrozenSept. 15 Major Face-to-Face Meetings in 2009  ITRS/ERD Meeting near Brussels, BelgiumMarch 18  ITRS/ERD Meeting at Semicon West (SF, CA)July 12  ITRS/ERD Meeting near Hsinchu, TaiwanNov. 30