Revised: Aug 1, ECE 263 Embedded System Design Lessons 23, 24 - Exceptions - Resets and Interrupts

Revised: Aug 1, Exceptions - Resets and Interrupts Polling vs. Interrupts Exceptions: Resets and Interrupts 68HC12 Exceptions –Resets –Interrupts: Maskable and Non-maskable 68HC12 Interrupt Response Exception Vector Exception Priority Programming an Interrupt Service Routine

Revised: Aug 1, Exceptions - Resets and Interrupts Polling versus interrupts –polling: constantly monitoring for flag to set program is tied up waiting for flag inefficient use of processor –interrupt: processor tells program when event has occurred program can be executing other tasks efficient use of processor –EX] sequentially ask question vs you ask me

Revised: Aug 1, Exceptions - Resets and Interrupts Resets: returns 68HC12 to known, well-defined state after detected fault –power-on reset –Computer Operating Properly (COP) reset –Clock Monitor reset –External reset Interrupts - planned, but unscheduled high priority event –non-maskable: may not be turned off by user –maskable: turned on and off by user with “I” bit in CCR

Revised: Aug 1, Exceptions - Resets and Interrupts “I” bit controlled with CLI and SEI command –CLI: Clear Interrupt Mask - turns interrupt system on –SEI: Set Interrupt Mask - turns interrupt system off Need to turn on specific interrupt locally

Revised: Aug 1, Exceptions - Resets and Interrupts (cont)

Revised: Aug 1, HC12 Interrupt Response fetch decode execute interrupt service routine

Revised: Aug 1, HC12 Interrupt Response Interrupt Vector –location of ISR –located in upper 128 bytes of memory –user must tie Vector to ISR Interrupt Priority –determines order of execution when multiple interrupts occur Interrupt Service Routine (ISR) - user written response routine to interrupt event

Revised: Aug 1, HC12 Interrupt Response - Interrupt Priority - "Copyright of Motorola, Used by Permission" Highest Priority Lowest Priority Non-maskable Maskable

Revised: Aug 1, Programming an Interrupt Service Routine Determine how interrupt is enabled –global: CLI –local enable bit Initialize Vector Table –directive approach –EVB SetUserVector Initialize Stack Enable interrupt Write the specific ISR

Revised: Aug 1, Programming an Interrupt Service Routine - an example Initialize the microprocessor for the interrupt. Initialize the stack - this is done through compiler settings Initialize any other necessary systems on the HC12. Initialize the interrupt vector table. You will need to use a special header file and code. –Header file is on your computer and is called abbie.h (change name). Code to set up your function to be an interrupt service routine will be similar to the following: This part declares your function as an interrupt service routine. #pragma interrupt_handler toggle_isr

Revised: Aug 1, Programming an Interrupt Service Routine - an example This part fills the appropriate vector with the address of your interrupt service routine. #pragma abs_address: 0x0B2A void (*Timer_Channel_2_interrupt_vector[])()={toggle_isr}; #pragma end_abs_address Make sure the interrupt you will be using is cleared to start. Initialize local interrupts. Initialize the interrupt system using the CLI command (With this header file use CLI(); ). Do this step last so that you aren’t inadvertently setting off interrupts before you finish initializing the system. Write the interrupt service routine to handle the interrupt.

Revised: Aug 1, Programming an ISR - an example Table 1. RAM Interrupt Vectors Interrupt Name RAM Vector Location BDLC (Key Wakeup J) $0B10, $0B11 ATD $0B12, $0B13 SCI $0B16, $0B17 SPI $0B18, $0B19 Pulse Accumulator Input Edge$0B1A, $0B1B Pulse Accumulator Overflow$0B1C, $0B1D Timer Overflow $0B1E, $0B1F Timer Channel 7 $0B20, $0B21 Timer Channel 6 $0B22, $0B23 Timer Channel 5 $0B24, $0B25 Timer Channel 4 $0B26, $0B27 Timer Channel 3 $0B28, $0B29 Timer Channel 2 $0B2A, $0B2B Timer Channel 1 $0B2C, $0B2D Timer Channel 0 $0B2E, $0B2F Real Time Interrupt $0B30, $0B31 IRQ $0B32, $0B33 XIRQ $0B34, $0B35 SWI $0B36, $0B37 Unimplemented Instruction Trap$0B38, $0B39 COP Failure $0B3A, $0B3B COP Clock Monitor Fail Reset$0B3C, $0B3D Reset $0BEF, $0BFF

Revised: Aug 1, Programming an Interrupt Service Routine - an example Example] In this task you will need to simultaneously generate two square waves with different frequencies. For one wave use the month and day of your birthday and for the second use the month and day of your Lab TA’s birthday. Verify that the waves are being generated simultaneously and that they have different frequencies with the oscilloscope.

Revised: Aug 1, Programming an Interrupt Service Routine - an example #include void toggle1_isr(void); //function prototype void toggle2_isr(void); #pragma interrupt_handler toggle1_isr //define as interrupt #pragma interrupt_handler toggle2_isr #pragma abs_address: 0x0B28 void (*Timer_Channel_3_interrupt_vector[])()={toggle2_isr}; void (*Timer_Channel_2_interrupt_vector[])()={toggle1_isr}; #pragma end_abs_address

Revised: Aug 1, Programming an Interrupt Service Routine - an example void initialize(void);// Define function initialize void main(void){ initialize(); // Initialize the timer system TMSK1 = 0x0C; TFLG1 = 0xFF; CLI(); // Initialize interrupts while(1) // Continuous loop { // Wait for interrupts ; }

Revised: Aug 1, Programming an Interrupt Service Routine - an example /* Function: initialize: enables the timer and sets up the M- Clk */ void initialize(){ CLKCTL = 0x02; // Set M-clock to divide by 4 (2 MHz) // CPU master clock divider ($0047) TMSK2 = 0x00; // Disable TOI, Prescale = 0; TIOS = 0x0C; // Make OS2 output compare TSCR = 0x80; // Enable the timer TCTL2 =0x50; }

Revised: Aug 1, Programming an Interrupt Service Routine - an example void toggle1_isr(void){ TFLG1 = 0x04; TC2 += 9091; } void toggle2_isr(void) { TFLG1 = 0x08; TC3 += 4854; }