Logic Gates

Transistors as Switches ¡EB voltage controls whether the transistor conducts in a common base configuraiton. ¡Logic circuits can be built

AND ¡In order for current to flow, both switches must be closed ¤Logic notation A  B = C ABC

OR ¡Current flows if either switch is closed ¤Logic notation A + B = C ABC

Properties of AND and OR ¡Commutation ¤A + B = B + A ¤A  B = B  A Same as

Properties of AND and OR ¡Associative Property ¤A + (B + C) = (A + B) + C ¤A  (B  C) = (A  B)  C =

Properties of AND and OR ¡Distributive Property ¤A + B  C = (A + B)  (A + C) ¤A + B  C ABCQ

Distributive Property ¡(A + B)  (A + C) ABCQ

Binary Addition ABSC(arry) Notice that the carry results are the same as AND C = A  B

Inversion (NOT) AQ Logic:

Exclusive OR (XOR) Either A or B, but not both This is sometimes called the inequality detector, because the result will be 0 when the inputs are the same and 1 when they are different. The truth table is the same as for S on Binary Addition. S = A  B ABS

Getting the XOR ABS Two ways of getting S = 1

Circuit for XOR Accumulating our results: Binary addition is the result of XOR plus AND

Half Adder Called a half adder because we haven’t allowed for any carry bit on input. In elementary addition of numbers, we always need to allow for a carry from one column to the next (plus a carry)

Full Adder INPUTSOUTPUTS ABC IN C OUT S

Full Adder Circuit

Chaining the Full Adder Possible to use the same scheme for subtraction by noting that A – B = A + (-B)

Binary Counting Use 1 for ON Use 0 for OFF = Binary Counter So our example has = = 43

NAND (NOT AND) ABQ

NOR (NOT OR) ABQ

Exclusive NOR ABQ Equality Detector

Summary Summary for all 2-input gates InputsOutput of each gate A B ANDNAND OR NORXORXNOR