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Logic Gates Learning Objectives Learn that there is a one-to-one relationship between logic gates and Boolean expressions Learn how logic gates are combined.

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Presentation on theme: "Logic Gates Learning Objectives Learn that there is a one-to-one relationship between logic gates and Boolean expressions Learn how logic gates are combined."— Presentation transcript:

1 Logic Gates Learning Objectives Learn that there is a one-to-one relationship between logic gates and Boolean expressions Learn how logic gates are combined to build circuits within processors Learn how logic gates are used to evaluate Boolean expressions to produce a result. Learn how logic gates can be combined to create full systems Learn what full and half adders are.

2 Logic Gates Electronic circuits that perform the Boolean functions are called logic gates. Below are the symbols used in the diagrams representing these circuits.

3 Logic Gates Exclusive OR function – XOR Input AInput BOutput 000 011 101 110

4 Logic Gates NAND function NAND is a combination of the AND and NOT Function. Input AInput BOutput 001 011 101 110

5 Logic Gates NAND function This can be shortened using the NAND Symbol. Which would make our diagram look like this

6 Logic Gates NOR function This is basically a OR followed by a NOT. If any of the inputs is true then the output is false. Input AInput BOutput 001 010 100 110

7 Logic Gates NOR function This can be shortened using the NOR Symbol. Which would make our diagram look like this

8 Logic Gates Combined circuits. Take a look at the diagram below: Can you draw a truth table and a Boolean expression for it?

9 Logic Gates Draw a logic diagram for the following Boolean expressions in Spec 19 1.2. Put your answer into Specification Journal 19 (1.3) Use logic.ly/demo/ to help you draw the diagrams

10 Logic Gates In the ALU (Arithmetic Logic unit) logic gates are used to add up numbers. For example 0+0 = 0 0+1 = 1 1+0 = 1 1+1 = 0 carry the one. When we see above we notice that the sum is generated by an XOR gate and the carry is generated by an AND Gate. The carry can then be added as an additional input in order to create a full adder.

11 Logic Gates Task Using logic.ly create a half adder and a full adder. Add your diagram to Specification Journal 19. Answer questions 4 & 5 on page 263 of your text book.


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