FEX Uli Schäfer, Mainz 1 L1Calo For more eFEX details see indico.cern.ch/getFile.py/access?contribId=73&sessionId=51&resId=0&materialId=slides&confId=170595.

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Presentation transcript:

FEX Uli Schäfer, Mainz 1 L1Calo For more eFEX details see indico.cern.ch/getFile.py/access?contribId=73&sessionId=51&resId=0&materialId=slides&confId=170595

L1Calo Phase-1 System Uli Schäfer 2 CPM JEM CMX Hub L1Topo ROD JMM PPR From Digital Processing System CPM JEM CMX Hub L1Topo ROD JMM PPR jFEX CPM JEM CMX Hub eFEX Hub Opt. Plant L1Topo ROD JMM New at Phase 1 RTM

Data replication Sliding window algorithm requiring large scale replication of data Forward duplication only (fan-out), no re-transmission Baseline: no replication of any source into more than two sinks Fan-out in eta (or phi) handled at source only (DPS) Duplication at the parallel end (on-FPGA), using additional Multi-Gigabit Transceivers Allowing for differently composed streams Minimizing latency Fan-out in phi (or eta) handled at destination only Baseline “far end PMA loopback” Looking into details and alternatives Uli Schäfer 3

FEX systems ATCA shelf / blades: eFEX and jFEX sharing some infrastructure Handling / splitting of fibre bundles ROD design Hub design Need to handle both very fine granularity and large environment eFEX up to 0.5×0.5 (η×φ) jFEX minimum 0.9×0.9  Require high density / high bandwidth per module eFEX probably two crates (baseline) jFEX single crate, ~ 8 modules (+FCAL ?) Need that density to keep input replication factor at acceptable level Uli Schäfer 4

FEX input (baseline) 6.4 Gb/s line rate, 8b/10b encoding,  128 bit per BC per fibre Assume fully duplicated data (in phi) from DPS Base granularity.1×.1 (η×φ) eFEX ( )e + h 0.025×.1 in strip layer and middle layer Reduce the required bandwidth by factor of two with help of “BCMUX” Rely on each channel carrying zero data every other bunch tick, due to FIR filter characteristics/peak finder jFEX e+h No “BCMUX” due to consecutive non-zero (pre- summed) data Uli Schäfer 5

Example : jFEX 8+ Modules, each covering full phi, limited eta range 8 FPGAs per module Processing core of 0.8×0.8 Environment 0.9×0.9 Each FPGA receives fully duplicated data in eta and phi: 1.6×1.6 worth of data required for a core of 0.8× ×0.1 in η×φ, e/m + had  512 energies, 64 Multi-Gb/s receivers  512 Multi-Gb/s receivers per module Uli Schäfer 6

How to fit on a module ? -- jFEX ATCA 8 processors (~XC7VX690T) ≤ 4 microPODs each fan-out passive or “far end PMA loopback” Small amount of control logic / non-realtime (ROD) Might add 9 th processor for consolidation of results Electrical backplane basically unused Opto connectors in Zone 3 Maximise module payload with help of small-footprint ATCA power brick and tiny IPMC mini-DIMM Uli Schäfer 7 Z3

…and 3-d Uli Schäfer 8

fibre count / density jFEX full duplication in phi direction, exactly half of all 512 signals are routed into the modules optically on fibres 256 fibres 22 × 12-channel opto receivers 4 × 72-way fibre bundles / MTP connectors For larger jet window we would require larger FPGAs, some more fibres and replication factor > ×2 eFEX 150~200 optical links for data input from LAr DPS >50% shared between modules >25% shared between FPGAs on the same module All numerology depends on exact partitioning of the FEXes: Uli Schäfer 9

eFEX numerology Uli Schäfer 10

Some considerations… 6.4 Gb/s baseline seems rock solid PCB simulations and measurements (on HSD) done for the eFEX agree well Fibre and module density are high at 6.4 Continue to dig into higher data rates Not ready to commit to 10Gb/s yet Even basic FEXes still have options Final choices once link speeds/bandwidth settled eFEX link contents awaiting final decision on BCMux scheme (simulations?) eFEX input data replication depends on environment for Tau agorithm jFEX depends on jet size Organisation of input links to be sorted out Uli Schäfer 11

conclusion 1-crate jFEX and 2-crate eFEX seem possible with ~2013’s technology Key technologies being used on L1Topo and UK HSD Allows for both good granularity and large environment at 6.4Gb/s line rate Rather dense circuitry Looking into higher transmission rates DPS needs to handle the required duplication (in eta)  Details of fibre organization and content cannot be presented now Uli Schäfer 12