1

2 LOOP DYNAMICS To keep track of deviations from the free-running frequency,

3

4 When frequency is the output variable, When voltage is the output variable,

5 L00P DYNAMICS - NO FILTER Step change in input frequency. = final value +initial value -final value

6 PLL OUTPUT WAVEFORMS

7 FREQUENCY RESPONSE CONCLUSIONS If the loop is being used as an FM demodulator, V 3 (t), the detected information (e.g. voice) waveform, has error due to inherent bandwidth limitations of the loop. Increased loop gain increases bandwidth and decreases response time. Adding a filter F(s) further changes the loop frequency response and time response. If the loop uses the output frequency, e.g. in a frequency multiplier, the output waveform will have transient behavior caused by the loop dynamics.

8 SIMPLEST LOWPASS FILTER Integrator Not a good idea, but simple to check out.

9 FIRST-ORDER LOWPASS FILTER

10 LOOP GAIN, FILTER BANDWIDTH, AND SETTLING TIME step response frequency response

11 PROBLEMS WITH FIRST ORDER LOWPASS FILTER LPF bandwidth simultaneously changes bandwidth of PLL frequency response and  Not enough degrees of design freedom.

12 LEAD-LAG FILTER Design: 1. For a given A LG, set  n. 2. Independently set 

13 PHASE DETECTOR (EOR-TYPE) Exclusive OR gives logic-one output whenever input waveforms differ; gives -5 V logic-zero output when waveforms are the same. The average output is the VCO output voltage, V 1. The rest of the output must be eliminated by the PLL filter. Notice these special features: 1. Output is zero for 90 o phase difference, not zero phase difference. 2. Wraparound effect limits output range of the phase detector - in this case to +5V.

14 PHASE DETECTOR - CONTINUED “Normal” phase difference is 90 o. Feedback corrections occur if angle deviates toward 0 o or toward 180 o. Notice that every phase detector output is a periodic function of 

15 LOCK RANGE A loop in lock remains in lock as long as the loop is capable of making suitable frequency corrections. The lock range,  L,MAX -  L,MIN, is defined by the phase detector limits and the loop gain.

16 LOCK RANGE CONTINUED Lock range =

17 EXAMPLE 15.3 Razavi’s example suggests the possibility of a nonlinear phase detector. Given phase lock, as long as correction occurs, the steady-state local oscillator frequency will equal the input frequency. Since the VCO curve is linear, the steady-state output voltage is a linear function of input frequency. Since K P is not constant for all  in, expect distortion in the time-varying output voltage waveform unless small-signal operation applies.

18 NONLINEAR PHASE DETECTOR The Gilbert cell (Lecture 5, pp17 & 18) can function as a phase detector. If V in and V cont are two 0 to 1 V “square waves,” the product is the same as the Exclusive OR. If V in and V cont are two sine waves, a different kind of phase detector characteristic is obtained.

19 CAPTURE MECHANISM AND CAPTURE RANGE “Capture is the complex nonlinear mechanism by which a PLL comes into lock. To illustrate the main principles we use the Gilbert Cell Multiplier. Assume the loop is not in lock. Then the output is All phase detectors produce such sum and difference frequencies. The sum-frequency term is rejected by the low pass filter F(s) The difference-frequency term eventually brings the loop into lock.

20 CAPTURE MECHANISM When difference frequency is high, filter output and feedback are negligible.

21 SIGNAL ACQUISITION Because  decreases linearly, V 1 (t) is periodic. Note coefficient of t decreases as difference decreases. Feedback signals go through the loop, initially small and fast - then increasing and becoming slower.

22 CAPTURE When the lower swing of the feedback signal pulls the instantaneous local oscillator frequency down to  i, the loop comes into lock. This capture waveform shows the amplitude of V 3 (t) increasing as its frequency decreases during the capture process.

23 CAPTURE CONDITION At the instant of capture, XX When  i approaches  FR, either from above or from below, lock occurs when  i come within  X of  FR

24 CAPTURE RANGE AND LOCK RANGE Because the filter gain is less than one,  LOCK >  CAPTURE

25 That’s all folks

26 Equations