Lecture 13 - Introduction to the Central Processing Unit (CPU)

Slides:



Advertisements
Similar presentations
The CPU The Central Presentation Unit What is the CPU?
Advertisements

Fetch-Execute cycle. Memory Read operation Read from memory.
The Fetch – Execute Cycle
Computer Architecture and the Fetch-Execute Cycle
Central Processing Unit
ARITHMETIC LOGIC SHIFT UNIT
Microprocessor.  The CPU of Microcomputer is called microprocessor.  It is a CPU on a single chip (microchip).  It is called brain or heart of the.
The CPU. Parts of the CPU Control Unit Arithmetic & Logic Unit Registers.
Computer Systems. Computer System Components Computer Networks.
CHAPTER 4 COMPUTER SYSTEM – Von Neumann Model
Stored Program Concept: The Hardware View
The processor and main memory chapter 4, Exploring the Digital Domain The Development and Basic Organization of Computers.
The central processing unit and main memory chapter 4, Exploring the Digital Domain The Development and Basic Organization of Computers.
Elements of the Computer (How a processor works)
The Computer Processor
The von Neumann Model – Chapter 4 COMP 2620 Dr. James Money COMP
Basic Operational Concepts of a Computer
Processor Structure & Operations of an Accumulator Machine
Stack Stack Pointer A stack is a means of storing data that works on a ‘Last in first out’ (LIFO) basis. It reverses the order that data arrives and is.
Computer Architecture and the Fetch-Execute Cycle
Computer Architecture and the Fetch-Execute Cycle
The CPU Central Processing Unit. 2 Reminder - how it fits together processor (CPU) memory I/O devices bus.
Computer Architecture Lecture 09 Fasih ur Rehman.
Von Neumann Machine Objectives: Explain Von Neumann architecture:  Memory –Organization –Decoding memory addresses, MAR & MDR  ALU and Control Unit –Executing.
The Central Processing Unit (CPU) and the Machine Cycle.
Model Computer CPU Arithmetic Logic Unit Control Unit Memory Unit
General Concepts of Computer Organization Overview of Microcomputer.
Lecture 14 Today’s topics MARIE Architecture Registers Buses
Computer Science 101 Computer Systems Organization ALU, Control Unit, Instruction Set.
DH2T 34 – HNC Computer Architecture 1 Lecture 14 The Fetch-Decode-Execute Cycle [1]. © C Nyssen/Aberdeen College 2003 All images © C Nyssen/Aberdeen College.
Fetch-execute cycle.
A summary of TOY. 4 Main Components Data Processor Control Processor Memory Input/Output Device.
D75P 34 – HNC Computer Architecture
Computer Hardware A computer is made of internal components Central Processor Unit Internal External and external components.
Computer Studies/ICT SS2
Dale Roberts Department of Computer and Information Science, School of Science, IUPUI CSCI N305 Information Representation: Machine Instructions.
CSE 241 Computer Organization Lecture # 8 Ch. 7 Control Unit Dr. Tamer Samy Gaafar Dept. of Computer & Systems Engineering.
September 26, 2001Systems Architecture I1 Systems Architecture I (CS ) Lecture 2: Implementation of a Simplified Computer Jeremy R. Johnson Wednesday,
COMPILERS CLASS 22/7,23/7. Introduction Compiler: A Compiler is a program that can read a program in one language (Source) and translate it into an equivalent.
Computer Organization 1 Instruction Fetch and Execute.
Dale & Lewis Chapter 5 Computing components
Question What technology differentiates the different stages a computer had gone through from generation 1 to present?
Control Unit Operations Chapter10:. What is Control Unit (CU)?(1)  Part of a CPU or other device that directs its operation.  Tells the rest of the.
Processor Organization
Processor Organization and Architecture Module III.
Designing a CPU –Reading a programs instruction from memory –Decoding the instruction –Executing the instruction –Transferring Data to/From memory / IO.
The Processor & its components. The CPU The brain. Performs all major calculations. Controls and manages the operations of other components of the computer.
Jeremy R. Johnson William M. Mongan
CPUz 4 n00bz.
Chapter 20 Computer Operations Computer Studies Today Chapter 20.
BASIC COMPUTER ARCHITECTURE HOW COMPUTER SYSTEMS WORK.
Lec 4-2 Five operations of the machine cycle Fetch- fetch the next program instruction from memory. (PC+1); instruction to IR Decode- decode the instruction.
3.1.4 Hardware a. describe the function and purpose of the control unit, memory unit and ALU (arithmetic logic unit) as individual parts of a computer;
Systems Architecture Keywords Fetch Execute Cycle
The Stored Program Computer
Lecture 13 - Introduction to the Central Processing Unit (CPU)
Components of Computer
The Processor and Machine Language
Functional Units.
Computer Organization and ASSEMBLY LANGUAGE
MARIE: An Introduction to a Simple Computer
Systems Architecture I (CS ) Lecture 2: A Simplified Computer
Central Processing Unit
GCSE OCR 1 The CPU Computer Science J276 Unit 1
Information Representation: Machine Instructions
Objectives Describe common CPU components and their function: ALU Arithmetic Logic Unit), CU (Control Unit), Cache Explain the function of the CPU as.
Computer Architecture
COMPUTER ARCHITECTURE
Computer Science. The CPU The CPU is made up of 3 main parts : Cache ALU Control Unit.
Presentation transcript:

Lecture 13 - Introduction to the Central Processing Unit (CPU)

Outcomes What is a CPU? How are instructions prepared by the CPU before execution? What registers and operations are involved in this preparation stage? Introduce register transfer language. What are opcodes and operands? Examples of executed instructions. Gain an understanding of the kind of processes that are performed in the CPU.

Central Processing UNIT (CPU) or Processor ‘heart’ of the digital computer, responsible for reading a program’s instruction from memory, executing it, and then control input’s and output’s within the machine, the CPU is not usually the memory holding the instruction and the input/output devices. What is a microprocessor is a CPU made on a single piece of semiconductor.

Fetch Before the CPU can use an instruction, the instruction must be brought to the CPU from the memory.

Starting with a program counter (PC) this points to the next instruction to be executed. Therefore, if the contents of the PC were 5, the next instruction to be executed is stored in memory location 5. The program counter is a pointer.

The contents of the program counter are copied to the memory address register (MAR). The program counter contents are then incremented to the next instruction. The MAR holds the address of the memory location where in memory the data is to be used is located.

The contents of MAR during this part of the cycle contains address of the instruction to be executed, the contents of this memory are placed into the memory data register (MDR).

During this part of the cycle the data that is passed from memory is an instruction. The instruction is moved from the MDR to the instruction register (IR) where it is divided into two fields.

One field is the operation code often shortened to opcode, which tells the CPU the instruction to carry out. The second field is the operand field, which contains the address/data (or addresses) of data used by the instruction. Sometimes the operand field is not used.

RTL (Register Transfer Language) for fetch part of the cycle. [MAR][PC] [PC][PC]+1 [MDR][M([MAR])] [IR][MDR] CU[IR(opcode)]

The next stage is the decode-execute cycle where the control unit takes the opcode from the instruction register, and generates the control signals to control the various parts of the CPU. The control unit is responsible during the fetch cycle for moving the contents of the PC to the MAR, executing a read cycle, and moving the contents of the MDR to the IR.

Execution Examples After the instruction has been performed we are into the execute part of the cycle, which is dependent on the instruction.

Ld A,4 Move the contents of memory location 4 to register A. [MAR][IR(operand)] The operand is transferred from the instruction register to the MAR. The Control unit performs the read operation, starting with buffering the contents stored in memory location 4 in the MBR.

[MDR][M([MAR])] The final operation is transferring the contents of the MBR to A. [A][MDR] Once the execution stage as finished, the fetch-execute cycle can being again. The cycle for the next instruction can being.

Add 5 Add the contents of memory address 5 to the data already stored in A. [MAR][IR(operand)] As in the previous example, the operand is transferred to the MAR, and the contents of the memory location pointed by the MAR are buffered in the MBR. [MDR][M([MAR])] At this point A and MBR store the data need for this instruction. To perform the addition, a control signal is set to the Arithmetic Logic Unit (ALU) where the addition is performed.

In Parallel ALU[A] ALU[MDR] The two items of data are sent to the ALU and the result of the addition is then transferred to the A. [A]ALU

Summary ‘heart’ of the digital computer, responsible for reading a program’s instruction from memory, executing it, and then control input’s and output’s within the machine. Fetch part of the fetch-execute in register-transfer language [MAR][PC] [PC][PC]+1 [MDR][M([MAR])] [IR][MDR] CU[IR(opcode)] The fetch part is the same for all instructions. The execute part depends on the instruction fetched