PTP Update & 1588 Switches

Why Adopt IEEE-1588 High accuracy time and frequency transfer via Ethernet Saves money Synchronization uses same channel as data (Ethernet) No additional cable for timing (i.e. no coax or twisted pair) Common media type Cat 5 cable or fiber Ethernet infrastructure Represents the future of accurate synchronization in an Ethernet centric world

Refresher: Packet Delays Timing packet NTP UDP IP Ethernet NTP UDP IP Ethernet NTP Timestamp location OSI Stack OSI Stack PTP Timestamp location Receive queue Transmit Receive queue Transmit Receive queue Transmit Network

1588 vs NTP vs IRIG Perspective IEEE-1588 NTP IRIG Peak time transfer error >100 ns >1 ms 10ms Network type LAN Dedicated coaxial cables Spatial extent A few subnets LAN/WAN 1 mile over coax Error Source Switches & port contention with data Routers & O/S stack delay Cable delay

How Precision is Possible Message Exchange Technique Periodic Sync messages broadcast master to slaves (every 2 seconds by default) Occasional delay measurement slaves to master Hardware-Assisted Time Stamping Time stamp leading edge of IEEE-1588 messages at network interface Time stamp hardware required at master and slaves Time stamp on send and receive Removes indeterminate host operating system stack delays Symmetricom proprietary algorithms use the precise time stamps to steer the oscillator for maximum precision

Understanding Slave Sync Accuracy Sync Accuracy is best defined as “it depends”… Switches between the Master and Slave reduce synchronization accuracy by way of: Packet arrival Jitter at switches and the Slave Network Latency during packet transfer Each network element contributes delays defined in terms of mean offsets with standard deviations Switch #1 + Switch #2 = Combined Error Error Error

Clock Error By Network Element - No Traffic Boundary Clock and Transparent Clock performance not expected to change with traffic load

Switch Characteristics COTS Switches introduce network timing jitter and diminishes PTP accuracy. Jitter is induced whenever two packets compete for the same egress port. 1588 enabled switches minimize switch induced network packet jitter.

Why Transparent Clocks (Switches)

Indeterminate Switch Delay Master Clock Time Slave Clock Time Sync message Switch t Sync message 1 Data at Slave Clock t t 2 2 Follow_Up message containing value of t 1 t , t Delay_Req message 1 2 t 3 m t t , t , t 3 1 2 3 t 4 Delay_Resp message containing value of t 4 t , t , t , t time 1 2 3 4 Client Time = (T4 – T3) + (T1 – T2) Offset 2

Switch Delay & Transparency Variable packet delay in switch (measured per Sync packet) Step 1 Delay inside switch varies packet to packet Transparent Clock (switch) measures the switch delay associated with the Sync Packet using hardware time stamping Switch modifies the t1 time stamp in the Follow-Up packet by adding the measured switch delay time sync packet left switch – time sync packet arrived at switch = Sync Packet delay inside switch Sync Packet tdepart – tarrive = delay Step 2 Modify time in Follow-Up Packet to account for Sync Packet delay Follow-Up Packet t1 unmodified Follow-Up Packet t1 modified = t1 unmodified + delay

COTS & 1588 Enabled Switches with Data Traffic Synchronization Error vs. Elapsed Time COTS Switch vs. 1588 Switch 40 COTS Switch 20 Time Error (microseconds) -20 No Traffic 5 Mbps TFTP Traffic -40 5 10 15 20 25 30 35 40 40 1588 Switch 20 Time Error (microseconds) No Traffic 5 Mbps TFTP Traffic -20 -40 5 10 15 20 25 30 35 40 Elapsed Time (k*seconds)

Previewing the…

SyncSwitch TC100 IEEE-1588 Transparent Clock

SyncSwitch TC100 It’s an Ethernet switch with IEEE-1588 transparency a.k.a IEEE-1588 v1 Compliant Transparent Clock Three (3) Models: 8x 10/100BaseT ports 6x 10/100BaseT ports 2x Multi mode fiber 6x 10/100BaseT ports 2x Single mode fiber

Key SyncSwitch TC100 Features Industry firsts.. 1U Rack mounted TC AC powered TC IEEE-1588 v1 Transparency IEEE-1588 v2 support comes later Copper or copper/fiber mix of ports GUI interface for custom configuration Basic configuration operates as a regular switch (plug & play!)  Prototype SyncSwitch

Advanced Features Simple Network Management Protocol (SNMP) Custom MIB IGMP Snooping Forward multicast traffic only to the hosts interested in that traffic. VLAN A VLAN has the same attributes as a physical LAN, but it allows for end stations to be grouped together even if they are not located on the same LAN segment. Supports network ring topology Rapid Spanning Tree Protocol (RSTP) OSI layer-2 protocol which ensures a loop free topology for any bridged LAN.

Range Ring Topology Idea outputs outputs Fiber Copper outputs outputs

How well does it work? Grandmaster, 7x 1588 SyncSwitches, 1x slave Packet arrival jitter at slave < 400 ns <58 ns error per switch

When to use the SyncSwitch Probably need a SyncSwitch… If data & timing packets travel the same network If measured error at slave is *not* acceptable If there are traffic bottlenecks at switches If Sub millisecond timing is required Absolutely if <1 ms timing required Probably don’t need a SyncSwitch… If measured error at slave is acceptable If desired timing accuracy at slave is in the milliseconds If using a network of Hubs

Deployment            Timing Grandmaster Data /Root Bottleneck (port contention, 5 in, 1 out) Bottleneck (port contention, 2 in, 1 out) Distribution /Network /Application Slave          

Transparent Clock vs Boundary Clock Switch Measures switch induced Sync packet delay Modifies Follow-Up packet time stamp (adds the delay) Flattens time distribution topology Increases packet load on Grandmaster Boundary Clock Switch & Clock Slave on one port Master on all other ports Built-in internal clock synchronized to the upstream master Cascaded Boundary Clocks can accumulate error Hierarchal time distribution topology Decreases packet load on Grandmaster Sync Packet tdepart – tarrive = delay Follow-Up Packet t1 unmodified Follow-Up Packet t1 modified = t1 unmodified + delay   S M M Slaves

XLi IEEE-1588 Grandmaster

XLi IEEE 1588 Grandmaster 1x Port Master or Slave Base XLi GPS Module 1x IEEE 1588 module IEEE 1588-2002 compliant, v1 Operates as grandmaster or ordinary clock (master/slave) Supports Best Master Clock Algorithm TIET (Time Interval/Event Timing on J1) 1/sec measurement output from RS-232 and/or Telnet/NIC

TIET (Time Interval/Event Timing) Measure the time interval difference between XLi Grandmaster 1PPS and an external 1PPS Application: Measure time transfer accuracy Master to Slave XLi TIET Output: 1/sec measurement output from RS-232 and/or Telnet/NIC Time Interval Master 1PPS Slave 1PPS

XLi 1588 Grandmaster 2 Port Master Master/Slave Same base features as 1x Port XLi Grandmaster Includes 2x IEEE 1588 cards Configurations Master/Master Master/Slave

TimeMonitor/TimeAnalyzer Software (Option) Chart View Functions Collect and analyze time interval data from the XLi 1588 Grandmaster Extensive graphing and charting functions Perform extensive analysis on collected data Collect data via RS-232 or TCP/IP interfaces Runs on Windows® NT, 2000, XP

Testing with a Single Port Grandmaster Third party IEEE 1588 slave characterization and network element delay measurements. Baseline the slave (via crossover or hub) Substitute network elements or topologies for study and characterization

Testing with a Dual Port Grandmaster The XLi Grandmaster hosts a second IEEE 1588 module that acts as a slave Baseline the XLi card slave (via crossover or hub) Substitute network elements or topologies for study and characterization

One Way Path Latency Testing Network separates the Grandmaster from the slave by an inconvenient distance. One XLi Grandmaster operates as a master Remote Grandmaster is configured with the IEEE 1588 module operating as a slave Slave module 1 PPS compared to GPS referenced XLi clock. GPS time is the common time reference

IEEE-1588 v2 in the XLi GM What When How Price Support IEEE-1588 v2 Default Profile When Fall 2008 How ECO in new models TBD regarding update to fielded models Price No price change to existing XLi GM Upgrades to fielded XLi GM units Details and price TBD

Looking ahead….. …at IEEE-1588 v2 (PTPv2) …at the big picture

Approved IEEE-1588 v2 Status From the source… 3/14/2008 Please note that this is still a draft standard. . . that has been submitted to the IEEE for final approval. . . The approval is on the RevCom agenda for their 26 March 2008 meeting. . . If the draft is approved the IEEE editorial staff typically takes several months before the final version of the standard is available. This editorial process does not permit any technical changes. Regards, John C. Eidson Chair P1588 Approved

IEEE 1588 v2 Main Elements New message types and formats More message rate choices Unicast Fault Tolerance Alternative timescales Transparent clocks On the fly timestamps Profiles Security More here than any one vendor will implement in a single solution

Message Update Intervals PTPv1 1,2,4,16, 64 seconds Default PTPv2 More than 18 hexillion choices As small as 30 fs As large as 3 days No profile will support all of these choices

Unicast Messages PTPv1 All messages multicast Every node in the same subnet hears every message PTPv2 Optional unicast mode Slaves request unicast stream Sync update interval Master can grant none, all or part of request Broadcast (1:all) Multicast (1:group) Unicast (1:1)

Alternate Time Scales PTPv1 TAI is only allowed time scale TAI has no leap seconds UTC offset field Flag indicate unknown accuracy PTPv2 Alternative time scales allowed Feature pushed into standard by Symmetricom Allows for time scales with leap seconds or DST jumps

Profiles PTPv1 v1 tailor made for industrial automation PTPv2 Many optional features Profiles limit choices Profiles created by industry specific standards body

Looking ahead….. …at IEEE-1588 v2 (PTPv2) …at the big picture

1588 marketplace snapshot… XLi GM NI PCI 1588 (GPS) Meinberg M600/PTP ? Grandmaster /Root Westermo Ruggedcom PTP Router TimeProvider 5000 Rockwell + Cisco SyncSwitch Hirschman BC ? Westermo TC Distribution /Network Techron Meinberg Syncbox NI PCI 1588 ZHW ? /Application Slave XLi GM

Symmetricom Directions Symmetricom Corporate Committed to packet based timing solutions Timing Test & Measurement Division (TTM) SyncSwitch TC100 Transparent Clock IEEE-1588 v2 support coming soon XLi Grandmaster IEEE-1588 v2 support by year end IEEE-1588 v2 will eventually be in most clock form factors 1U clocks Bus cards Custom modules