Digital Logic Systems Combinational Circuits. Basic Gates & Truth Tables.

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Presentation transcript:

Digital Logic Systems Combinational Circuits

Basic Gates & Truth Tables

Basic Gates AND GateOR GateNOT Gate

More Gates NAND GateNOR GateBUF Gate

More Gates XNOR GateXOR Gate

n-Input Gates 3-Input XOR Gate 5-Input NOR Gate5-Input AND Gate 4-Input OR Gate

Definitions AND It gives a logical output true only if all the inputs are true OR It gives a logical output true if any of the inputs is true XOR It gives a logical output true only if an odd- number of inputs is true NOT It gives a logical output true if the input is false and vice versa

Truth Table A truth table is a tabular procedure to express the relationship of the outputs to the inputs of a Logical System

Truth Tables for Gates abf AND abf OR af NOT AND OperationOR Operation NOT Operation AND GateOR GateNOT Gate

Truth Tables for Gates abf NAND abf NOR af BUF NAND OperationNOR Operation BUF Operation NAND GateNOR GateBUF Gate

Truth Tables for Gates abf XOR abf XNOR XOR OperationXNOR Operation XNOR GateXOR Gate

A Bubble Implies a Logical Inversion Bubbles can be replaced by NOT Gates to get logically equivalent circuits Bubbles

Generate tables for all combinations of bubbles and a XOR gate

Gate Equivalence = = =

= = ?

= =

Switching Expressions

Basic Switching Expressions AND f = a. b OR f = a + b NOT f = a’ f = ā

Is there an expression for XOR operation?

Switching Expressions

f 1 = a. b’ f 2 = (a + b)’

Switching Expressions

f = ?

Switching Expressions f = m + n n = a’. b m = a. b’

Switching Expressions f = (a. b’) + (a’. b) This is the equivalent circuit and equivalent expression for a XOR operation

From Digital Design, 5th Edition by M. Morris Mano and Michael Ciletti

Switching Expressions

f 1 = a. b f 2 = a ^ b f 2 = (a. b’) + (a’. b)

Switching Expressions

xyzp = x ^ yg = x. ym = p. zs = p ^ zc = m + g

xyzp = x ^ yg = x. ym = p. zs = p ^ zc = m + g

xyzp = x ^ yg = x. ym = p. zs = p ^ zc = m + g

xyzp = x ^ yg = x. ym = p. zs = p ^ zc = m + g

xyzsc

s = s c = m + g

s = s c = m + g m = p. z g = g s = p ^ z

s = s c = m + g m = p. z g = g p = x ^ y g = x. y s = p ^ z

s = s c = m + g p = x ^ y g = x. y m = (x ^ y). z g = g s = (x ^ y) ^ z

c = ((x ^ y). z) + (x. y) p = x ^ y g = x. y m = (x ^ y). z g = g s = (x ^ y) ^ z

c = ((x ^ y). z) + (x. y)

s = ((x. y’) + (x’. y)) ^ z c = (((x. y’) + (x’. y)). z) + (x. y)

s = (((x. y’) + (x’. y))’. z) + (((x. y’) + (x’. y)). z’) c = (((x. y’) + (x’. y)). z) + (x. y)

Procedure To obtain the output functions from a logic diagram, proceed as follows: 1.Label with arbitrary symbols all gate outputs that are a function of the input variables. Obtain the Boolean Functions for each gate. 2.Label with other arbitrary symbols those gates that are a function of input variables and/or preciously labeled gates. Find the Boolean functions of these gates. 3.Repeat the process in step 2 until all the outputs of the circuit are obtained. 4.By repeated substitution of previously defined functions, obtain the output Boolean functions in terms of input variables only.