ACADs (08-006) Covered Keywords Switching power supply, amplifier, logic, digital, circuit, solid state. Description Supporting Material e

PVNGS GOALS

Introduction Plant Status Class Guidelines PVNGS Goals Focus on Five Lab PPE requirements Student Participation Attendance sheet Breaks

Course Terminal Objective Using reference material furnished by the instructor, the Plant Technician will discuss solid state fundamentals, build, calibrate and test electronic circuits to support theory, and demonstrate an understanding of solid state fundamentals by successful completion of a Lab Practical Evaluation (LPE).

Enabling Objectives Describe the HU fundamentals to be used and hazards associated with working on electronic components Describe the purpose for Inspecting and reworking printed circuit boards Describe the functions and associated controls of the Tektronix 2445 Oscilloscope Describe barrier potential effects on the PN junction of a general purpose diode Build/test/analyze a series and series-parallel diode circuit Describe special purpose diode design and application Build/test/analyze a Zener diode voltage regulator circuit Describe Single Phase DC power supply design and application.

1.1.9 Build/test/analyze a Single Phase DC Power supply circuit Describe voltage divider and voltage multiplier device design and application Describe Light Emitting Diodes (LED's) device design and application Build/test/analyze an LED circuit Describe Bipolar Junction Transistor (BJT) device design, operation and application Build/test/analyze a Bipolar Junction Transistor (BJT) switching circuit Describe Silicon Controlled Rectifier (SCR) device design and application Build/test/analyze an SCR switching circuit Describe Triac, Diac, and Unijunction Transistor (UJT) device design and application Build/test/analyze a Triac, Diac, and UJT circuit.

Describe Field Effect Transistor (FET) device design and application Build/test/analyze a Field Effect Transistor (FET) circuit Describe Integrated Circuit (Op Amp) device design and application Build/test/analyze integrated (Op Amp) circuits Describe Digital Logic symbols and truth tables Describe Fiber Optic circuit device design and application.

Prevent Events Achieving Breakthrough Performance It’s everyone’s responsibility to work safely and prevent events. Ask yourself before beginning a job: NEA07

Prevent Events What are the critical steps of the task? What document describes it? Do I understand it? NEA07

Prevent Events What is the worst thing that can happen and how can I prevent it? NEA07

Prevent Events What else could go wrong? NEA07

Prevent Events What are the safety and/or radiation protection considerations? NEA07

Prevent Events Is my training, and are my qualifications up to date? NEA07

Class Experience

INVERTER AC OUTPUT BREAKER TRIP CIRCUIT DRAWING E NEA07

E

NEA07 Backplane Drawing E

PC Board HU and Safety Electrostatic discharge: Electrostatic discharge is the movement of electrons from a source to an object. Static electricity is an electrical charge at rest. The most common way to build static electricity is by friction. Friction creates an electron buildup or a negative static charge. When a person contacts a positive charged or grounded object, all excess electrons flow (jump) to that object. Electrostatic discharge can be 35,000 volts or more. People normally do not feel electrostatic discharges until the discharge reaches 3000 volts. Solid state devices and circuits may be damaged or destroyed by a 10 volt electrostatic discharge. The effects of static discharge may be cumulative and not readily obvious. Technicians and maintenance Electricians should wear a wrist grounding strap or other type of grounding device to avoid damage to solid state devices and circuits. NEA07

U2R9: 2EPNDN14 INVERTER BACKPLANE COLD SOLDER CONNECTIONS ON XFMR. Cold Solder Joint NEA07

Cold Solder Joint U2R9: 2EPNDN14 INVERTER BACKPLANE COLD SOLDER CONNECTIONS ON XFMR. NEA07

Cold Solder Joint U2R9: 2EPNDN14 INVERTER BACKPLANE COLD/DIRTY SOLDER CONNECTIONS ON BACKPLANE NEA07

Cold Solder Joint U2R9: 2EPNDN14 INVERTER BACKPLANE COLD/DIRTY SOLDER CONNECTIONS ON BACKPLANE NEA07

Cold Solder Joint U2R9: 2EPNDN14 INVERTER BACKPLANE COLD/DIRTY SOLDER CONNECTIONS ON BACKPLANE NEA07

N Cold Solder Joint U2R9: 2EPNDN14 INVERTER BACKPLANE COLD SOLDER CONNECTIONS ON XFMR. NEA07

U1R9: 1EPKDN44 INVERTER BACKPLANE NEA07

U1R9: INVERTER 1EPKDN44 BACKPLANE NEA07

U1R9: INVERTER 1EPKDN44 J2 BOARD FOIL SIDE DAMAGED PC BOARD + 15 VOLT PIN CONTACT. NEA07

U1R9 U1R9: INVERTER 1EPKDN44 J2 BOARD FOIL SIDE DAMAGED PC BOARD + 15 VOLT PIN CONTACT. NEA07

U1R9 U1R9: 1EPNAN11 INVERTER: MISSING MOLEX CONNECTOR PIN NEA07

U1R9 U1R9: 1EPNAN11 INVERTER: MISSING MOLEX CONNECTOR PIN. U1R9: INVERTER 1EPNAN11: DOOR CONTROL PANEL: DEFECTIVE MOLEX CONNECTOR PIN. NEA07

Tektronix 2445 Section 3 – Controls, Connectors and Indicators

Review of semiconductor fundamentals 1. In Semiconductors production, doping refers to the process of intentionally introducing impurities into an extremely pure (intrinsic) semiconductor in order to change its electrical properties. 2. Basic semiconductor materials are silicon and germanium. In there pure state they are poor conductors and have 4 Electrons in the valence shell, by adding impurities to the intrinsic structure we create an excess of holes or electrons in the material. 3. Boron, arsenic, phosphorus and occasionally gallium are used To dope silicon and are called dopants.

Silicon and germanium have 4 electrons in the outer shell.

Silicon doped with a trivalent material such as boron becomes known P-type. The trivalent material has 3 electrons leaving the outer valence Deficient 1 electron or “hole”. The majority current carriers are holes.

Silicon doped with a pentavalent material such as phosphorus becomes known as N-type. The pentavalent material has 5 electrons.living the outer valence shell 1 free electron. Electrons are the majority Current carrier.

Combine them to make one piece of semiconductor which is doped differently on each side of the junction. PN Junction formation:

Free electrons on the n-side and free holes on the p-side can initially wander across the junction. When a free electron meets a free hole it can 'drop into it'. So far as charge movements are concerned this means the hole and electron cancel each other and vanish. As a result, the free electrons and holes near the junction tend to eat each other, producing a region depleted of any moving charges. This creates what is called the depletion zone.

P N Junction Biasing Applying a forward or reverse bias to the junction will change the depletion region width. Forward bias reduces the region resulting in conduction Reverse bias enlarges the region resulting in no conduction.

Junction Diode The Junction diode is the simplest semiconductor. It is formed by doping on-half of the intrinsic material with a p-type dopant and the other half with an n-type dopant. The boundary at the p and n regions is called the pn junction.

Typical junction drop Silicon-- 0.7volts, Germanium --0.3volts Junction Diode Characteristic

Junction Diode Parameters When selecting diodes, two device ratings must be taken into consideration; Peak Reverse Voltage and Maximum Average Forward Current Can be classified as: – Maximum Average Forward Current is usually given at a special temperature, usually 25°C, (77°F) and refers to the maximum amount of average current that can be permitted to flow in the forward direction. If this rating is exceeded, structure breakdown can occur. – Peak Reverse Voltage or Peak Inverse Voltage is the maximum voltage that a diode can withstand in the reverse direction without breaking down and starting to conduct. If this voltage is exceeded the diode may be destroyed. Diodes must have a Peak Inverse Voltage rating that is higher than the maximum voltage that will be applied to them when reverse biased.

Zener Diodes A Zener diode is a type of diode that permits current to flow in the forward direction like a normal diode, but also in the reverse direction if the voltage is larger (not equal to, but larger) than the rated breakdown voltage known as "Zener knee voltage" or "Zener voltage". The breakdown voltage can be controlled quite accurately in the doping process. Tolerances to within 0.05% are available though the most widely used tolerances are 5% and 10%.

Zener Diodes The zener diode uses a p-n junction in reverse-bias to make use of the zener-effect, which is a breakdown phenomenon which holds the voltage close to a constant value called the zener “knee” voltage. It is useful in regulator applications

Various Diodes and there symbols. Diode symbols: a - regulating and HF diode, b - LED, c, d -Zener, e - photo, f,g - tunnel, h - Schottky, i - breakdown, j - capacitative

NEA07 Page 45 Slide 15

NEA07

Slide 18

NEA07 Slide 17

Transistors Can be classified as: – BJT – Bipolar Junction Transistor; Minority carrier device; Bipolar device. – FET – Field Effect Transistor; Majority carrier device; Unipolar device;

NPN and PNP Junctions A Bipolar Transistor essentially consists of a pair of PN Junction Diodes that are joined back-to-back. This forms a sort of a sandwich where one kind of semiconductor is placed in between two others. There are therefore two kinds of Bipolar sandwich, the NPN and PNP varieties. The three layers of the sandwich are conventionally called the Collector, Base, and Emitter. The reasons for these names will become clear later once we see how the transistor works.

NPN and PNP Junctions Figure 1 shows an NPN transistor with no external voltages. We see a back-to-back pair of PN Diode junctions with a thin P-type filling between two N-type slices of 'bread'. In each of the N-type layers conduction can take place by the free movement of electrons in the conduction band. In the P-type (filling) layer conduction can take place by the movement of the free holes in the valence band. However, in the absence of any externally applied electric field, we find that depletion zones form at both PN-Junctions, so no charge wants to move from one layer to another.

NPN and PNP Junctions Applying voltage between the Collector and Base parts of the transistor. The polarity of the applied voltage is chosen to increase the force pulling the N- type electrons and P-type holes apart. (Collector positive with respect to the Base.) This widens the depletion zone between the Collector and base and so no current will flow. In effect we have reverse-biased the Base-Collector diode junction. The precise value of the Base-Collector voltage can vary here we see 10 v.

Applying a relatively small Emitter-Base voltage designed to forward-bias the Emitter- Base junction. This 'pushes' electrons from the Emitter into the Base region and sets up a current flow across the Emitter-Base boundary. Once the electrons have managed to get into the Base region they can respond to the attractive force from the positively- biased Collector region. As a result the electrons which get into the Base move swiftly towards the Collector and cross into the Collector region. We now see an Emitter- Collector current whose magnitude is set by the chosen Emitter-Base voltage we have applied. To maintain the flow through the transistor we have to keep on putting 'fresh' electrons into the emitter and removing the new arrivals from the Collector. Hence we see an external current flowing in the circuit.

Some of the free electrons crossing the Base encounter a hole and 'drop into it'. As a result, the Base region loses one of its positive charges (holes) each time this happens. If we didn't do anything about this we'd find that the Base potential would become more negative (i.e. 'less positive' because of the removal of the holes) until it was negative enough to repel any more electrons from crossing the Emitter-Base junction. The current flow would then stop. To prevent this happening we use the applied Emitter-Base voltage to remove the captured electrons from the Base and maintain the number of holes it contains. This have the overall effect that we see some of the electrons which enter the transistor via the Emitter emerging again from the Base rather than the Collector.

The Bipolar junction transistors (BJT) have three terminals named emitter, base and collector. Two p-n junctions exist inside a BJT: the base/emitter junction and base/collector junction. An easy way to identify a specific transistor configuration is to follow three simple steps: 1. Identify the element (emitter, base, or collector) to which the input signal is applied. 2. Identify the element (emitter, base, or collector) from which the output signal is taken. 3. The remaining element is the common element, and gives the configuration its name. Bipolar junction transistor

Common Emitter

Common Base

Common Collector

Using Kirchoff's current law and the sign convention shown above we find that the base current equals the difference between the emitter and collector current. Bipolar junction transistor

The Base current: Ib = Ie – Ic The ratio of the collector current to the base current of a bipolar transistor, commonly referred to as the current amplification factor or : The transistor beta : β β = Ic/Ib

Bipolar junction transistor hie :dynamic input resistance in the common emitter configuration. hfe: forward current transfer ratio or gain of the transistor. 1/hoe:the output conductance. hre: represents a small input voltage developed as a result of reverse feedback from the output circuit.

Bipolar junction transistor Current Gain varies with the Collector Current level, IC. From this graph we can see that the proportion of electrons 'caught' by a hole while trying to cross the Base region does vary a bit depending on the current level. Note that the graph doesn't show the transistor's beta value, it shows a related figure called the transistor's Small Signal current gain, hfe. This is similar to the beta value, but is defined in terms of small changes in the current levels. This parameter is more useful than the beta value when considering the transistor's use in signal amplifiers where we're interested in how the device responds to changes in the applied voltages and currents.

Bipolar junction transistor The second way we can characterize the behavior of a Bipolar Transistor is by relating the Base-Emitter voltage, VBE, we apply to the Base current, IB, it produces. As can expect from the diode-like nature of the Base-Emitter junction this voltage/current characteristic curve has an exponential-like shape similar to that of a normal PN Junction diode.

Bipolar junction transistor Characteristic curve of a typical transistor.

Bipolar junction transistor Characteristic curve of a typical transistor.

Bipolar junction transistor Operating Curve examples: The transistor Q point or operating point is demonstrated by the curves below. As long as the input swing is on the linear portion of the operating curve the output will be linear.

Bipolar junction transistor When (negative) feedback is introduced, most of these problems diminish or disappear, resulting in improved performance and reliability. There are several ways to introduce feedback to this simple amplifier, the easiest and most reliable of which is accomplished by introducing a small value resistor in the emitter circuit. The amount of feedback is dependent on the relative signal level dropped across this resistor.If RL = Re the gain is a approximately unity.

The Silicon Controlled Rectifier or SCR The Silicon Controlled Rectifier (SCR) is simply a conventional rectifier controlled by a gate signal. The main circuit is a rectifier, however the application of a forward voltage is not enough for conduction. A gate signal controls the rectifier conduction. The schematic representation is:

The Silicon Controlled Rectifier or SCR The rectifier circuit (anode-cathode) has a low forward resistance and a high reverse resistance. It is controlled from an off state (high resistance) to the on state (low resistance) by a signal applied to the third terminal, the gate. Once it is turned on it remains on even after removal of the gate signal, as long as a minimum current, the holding current, Ih, is maintained in the main or rectifier circuit. To turn off an SCR the anode-cathode current must be reduced to less than the holding current, Ih.

The Silicon Controlled Rectifier or SCR The reverse characteristics are the same as the diode, having a breakover voltage with its attending avalanche current; and a leakage current for voltages less than the breakover voltage. In the forward direction with open gate, the SCR remains essentially in an off condition (notice though that there is a small forward leakage) up until the forward breakover voltage is reached. At that point the curve snaps back to a typical forward rectifier characteristic. The application of a small forward gate voltage switches the SCR onto its standard diode forward characteristic for voltages less than the forward breakover voltage.

The Silicon Controlled Rectifier or SCR

Obviously, the SCR can also be switched by exceeding the forward breakover voltage, however this is usually considered a design limitation and switching is normally controlled with a gate voltage. One serious limitation of the SCR is the rate of rise of voltage with respect to time, dV/dt. A large rate of rise of circuit voltage can trigger an SCR into conduction. This is a circuit design concern. Most SCR applications are in power switching, phase control, chopper, and inverter circuits.

The Silicon Controlled Rectifier or SCR Major considerations when ordering SCR’s: (a) Peak forward and reverse breakdown voltages (b) Maximum forward current (c) Gate trigger voltage and current (d) Minimum holding current,Ih (e) Power dissipation (f) Maximum dV/dt

The DIAC, or diode for alternating current, is a bidirectional trigger diode that conducts current only after its breakdown voltage has been exceeded momentarily. When this occurs, the resistance of the diode abruptly decreases, leading to a sharp decrease in the voltage drop across the diode and, usually, a sharp increase in current flow through the diode. The diode remains "in conduction" until the current flow through it drops below a value characteristic for the device, called the holding current. Below this value, the diode switches back to its high-resistance (non-conducting) state. When used in AC applications this automatically happens when the current reverses polarity.

The DIAC

Circuit symbol and device cross-section of a) a Diode AC switch (DIAC) and a Triode AC switch (TRIAC

FET: Field-effect transistor s The JFET is a class of Unipolar semiconductor device which comes in two basic varieties, n or p channel. The device in general `runs in the depletion mode with three regions operation: Pinchoff, Breakdown and Triode. Two primary types: – JFET, Junction FET –. n or p channel depletion mode. – MOSFET, Metal-Oxide-Semiconductor FET. Also known as IGFET – Insulated Gate FET; MOS transistors can be: – n-Channel; Enhancement mode; Depletion mode; – p-Channel; Enhancement mode; Depletion mode;

FET: Field-effect transistors The JFET is a class of Unipolar semiconductor device which comes in two basic varieties, n or p channel. The device in general `runs in the depletion mode with three regions operation: Pinchoff, Breakdown and Triode.

In the n-channel JFET the device is generally operated with the gate to channel pn junction in a reverse bias, the level of the reverse bias determines the thickness of the depletion region in the channel to control the Drain to Source resistance.

With a steady gate-source voltage of ­1 V there is always 1 volt across the wall of the channel at the source end. A drain-source voltage of 1V means that there will be 2 volts across the wall at the drain end. (The drain is ‘up’ 1V from the source potential and the gate is 1V ‘down’, hence the total difference is 2V.) The higher voltage difference at the drain end means that the electron channel is squeezed down a bit more at this end.

When the drain-source voltage is increased to 10V the voltage across the channel walls at the drain end increases to 11V, but remains just 1V at the source end. The field across the walls near the drain end is now a lot larger than at the source end. As a result the channel near the drain is squeezed down quite a lot.

Increasing the source-drain voltage to 20V squeezes down this end of the channel still more. As we increase the drain-source voltage we increase the electric field which drives electrons along the open part of the channel. However, we can now see that increasing the drain-source voltage also squeezes down the channel near the drain end. This reduction in the open channel width makes it harder for electrons to pass. The two effects of greater push along the channel and a tighter squeeze tend to cancel out. As a result the drain-source current tends to remain constant when we increase the drain-source voltage.

FET: Characteristic Curve

Pinchoff: Vp is that value of V d-s at which the knee of the V g-s =0 curve occurs. Vp is defined as the gate –source voltage required to reduce the drain current to 1 micro amp at a Vd-s of 15v. It can range from -.4 to - 8.0v Breakdown: At some positive V d-s the device will have breakdown, at which point the current will increase very rapidly (unless limited by the external circuit) Triode mode is usually used to turn something on as in the circuit below. It may not be obvious from this circuit but you want the voltage drop across the FET to be as small as possible when the relay is switched on. Usually when you turn something off you want the switching element, FET, to have infinite impedance. Cutoff mode is great for that. When you turn something on you want the switch to have 0 impedance. This is so the device being turned on gets all of the power and no power is wasted or dissipated in the FET.

Triode Mode example

MOSFET SYMBOLS

MOSFET NMOS cross section Biasing: Creating a channel for current flow.

Placing an insulating layer between the gate and the channel allows for a wider range of control (gate) voltages and further decreases the gate current (and thus increases the device input resistance). The insulator is typically made of an oxide (such as silicon dioxide, SiO2), This type of device is called a metal-oxide-semiconductor FET (MOSFET) or insulated- gate FET (IGFET). Cross-section and circuit symbol of an n-type Metal- Oxide-Semiconductor-Field-Effect-Transistor (MOSFET

Since there is an insulator between the gate and channel, the gate is not restricted in polarity. There are 2 modes of operation for the MOSFET, they are enhancement and depletion. Figure 1. Construction of a MOSFET. (n-channel, enhancement), Figure 2. The MOSFET with a positive gate voltage.

Pinchoff is simply an equilibrium point with constant current for a fixed gate-source voltage. Figure below shows the channel in pinchoff. Pinchoff begins when V g-d < VT. MOSFET under operation in the triode region.(V d-s small),

The enhancement mode device is also referred to as the “normally off” MOSFET. this is because with zero gate bias voltage the source and drain contacts are separated by two pn junctions connected back to back. The depletion mode device is also referred to as the “normally on” MOSFET.this is because with zero gate bias voltage the source and drain islands, which are of n type material are connected by an n channel. A large enough negative bias to the gate will be sufficient to convert the n material in the channel to p type. In this way the 2 n islands become separated by a p region.

MOSFET Characteristic Curve

MOSFET: Id vs V g-s curves

VT Design Trade-Off (Important consideration for digital-circuit applications) Low VT is desirable for high ON current –where VDD is the power-supply voltage …but high VT is needed for low OFF current Low V T High V T I OFF,high VT I OFF,low VT V GS log I DS 0

Typical Operational Amplifiers

An inside look at the uA 741 Op Amp

The Operational Amplifier is a solid state Integrated circuit that consists of a direct coupled high gain amplifier with differential inputs and usually a single ended output that uses external feedback to control it’s functions. Differential amplifier – Input stage — provides low noise amplification, high input impedance usually a differential output. Voltage amplifier – Provides high voltage gain, a single-pole frequency roll-off, usually single- ended output. Output amplifier – Output stage — provides high current driving capability, low output impeadence, current limiting and short circuit protection circuitry.

The Op- amp in sections

An inside look at the uA 741 Op Amp

The blue outlined section is a differential amplifier. Q1 and Q2 are input emitter followers and together with the common base pair Q3 and Q4 form the differential input stage. In addition, Q3 and Q4 also act as level shifters and provide voltage gain to drive the class A amplifier. The differential amplifier formed by Q1 - Q4 drives a current mirror active load formed by transistors Q5 - Q7. Q7 increases the accuracy of the current mirror by decreasing the amount of signal current required from Q3 to drive the bases of Q5 and Q6. This current mirror provides differential to single ended conversion as follows: The signal current of Q3 is the input to the current mirror while the output of the mirror (the collector of Q6) is connected to the collector of Q4. Here, the signal currents of Q3 and Q4 are summed. For differential input signals, the signal currents of Q3 and Q4 are equal and opposite. Thus, the sum is twice the individual signal currents. This completes the differential to single ended conversion. The open circuit signal voltage appearing at this point is given by the product of the summed signal currents and the paralleled collector resistances of Q4 and Q6. Since the collectors of Q4 and Q6 appear as high resistances to the signal current, the open circuit voltage gain of this stage is very high. A. The section outlined in blue is the Differential input stage.

B. The sections outlined in red are Current mirrors. The input stage DC conditions are controlled by the two current mirrors on the left. The current mirror formed by Q8/Q9 allows for large common mode voltages on the inputs without exceeding the active range of any transistor in the circuit. The current mirror Q10/Q11 is used, indirectly, to set the input stage current. This current is set by the 5 k Ω resistor. The input stage bias control acts in the following manner. The outputs of current mirrors, Q8/Q9 and Q10/Q11 together form a high impedance current differencing circuit. If the input stage current tends to deviate (as detected by Q8) from that set by Q10, this is mirrored in Q9 and any change in this current is corrected by altering the voltage at the bases of Q3 and Q4. Thus the input stage DC conditions are stabilized by a high gain negative feedback system. The top-right current mirror Q12/Q13 provides a constant current load for the class A gain stage, via the collector of Q13, that is largely independent of the output voltage.

The stage consists of two NPN transistors in a Darlington configuration and uses the output side of a current mirror as its collector load to achieve high gain. C. The section outlined in magenta is the Class A gain stage. The 30 pF capacitor provides frequency selective negative feedback around the class A gain stage as a means of frequency compensation to stabilize the amplifier in feedback configurations. This technique is called Miller compensation. Darlington transistor is a semiconductor device which combines two bipolar transistors in tandem (often called a "Darlington pair") in a single device so that the current amplified by the first is amplified further by the second transistor. This gives it high current gain (written β or Hfe), and takes up less space than using two discrete transistors in the same configuration. The use of two separate transistors in an actual circuit is still very common, even though integrated packaged devices are available.

D. The section outlined in green is the Output bias circuitry. The green outlined section (based around Q16) is a voltage level shifter or Vbe multiplier; a type of voltage source. In the circuit as shown, Q16 provides a constant voltage drop between its collector and emitter regardless of the current passing through the circuit. If the base current to the transistor is assumed to be zero, and the voltage between base and emitter (and across the 7.5 kΩ resistor) is V (a typical value for a BJT in the active region), then the current flowing through the 4.5 kΩ resistor will be the same as that through the 7.5 kΩ, and will produce a voltage of V across it. This keeps the voltage across the transistor, and the two resistors at = 1 V. This serves to bias the two output transistors slightly into conduction reducing crossover distortion. In some discrete component amplifiers this function is achieved with (usually 2) silicon

The output stage (outlined in cyan) is a Class AB push-pull emitter follower (Q14, Q20) amplifier with the bias set by the Vbe multiplier voltage source Q16 and its base resistors. This stage is effectively driven by the collectors of Q13 and Q19. The output range of the amplifier is about 1 volt less than the supply voltage, owing in part to Vce(sat) of the output transistors. The 25 Ω resistor in the output stage acts as a current sense to provide the output current limiting function which limits the current flow in the emitter follower Q14 to about 25 mA for the 741. Current limiting for the negative output is done by sensing the voltage across Q19's emitter resistor and using this to reduce the drive into Q15's base. Later versions of this amplifier schematic may show a slightly different method of output current limiting. The output resistance is not zero as it would be in an ideal op-amp but with negative feedback it approaches zero. E. The section outlined in cyan is the Output stage amplifier.

Logic Symbols Equivalent circuit

Ideal characteristics of the Op Amp The ideal operational amplifier would have the following characteristics : 1. Infinite gain 2. Infinite Bandwidth 3. Infinite input impendence: Zin 4. Zero Output impendence: Zo 5. Zero input offset voltage 6. Infinite Io drive capability 7. Zero input current 8. True differential amplification true at all operating temperatures.

EO1List the ideal values of Op Amp parameters Typical vs. Ideal operational amplifier values:

Typical 741 pin out showing the P/S connections.

EO2 Define the following terms: Common mode rejection ratio (CMRR) The measure of the ability of the Op Amp to reject signals that are simultaneously present at both input signal terminals. CMRR = 20 Log Ad/Ac Ad = Differential Gain Ac = Common mode gain Expressed in db

Showing Differential Mode InputShowing Common Mode Input The Op Amp is a current device in, and a voltage device out. The Op Amp's output is dependent on the current difference between the input pins. If you tied both pins together and applied a very large signal to this connection: the output would be unchanged, or at most, a weak replica of the input. This is known as common mode rejection, (CMR).

B. Gain-bandwidth-product (GBP) The product of the closed-loop gain of the Op amp and it’s corresponding closed-loop bandwidth.

C. Input offset voltage (Voi)- the voltage that must be applied to one of the input terminals to give zero output voltage under no signal conditions. D. Inverting input – The input terminal to which the signal is applied and produces a 180 degree phase shift at the output. E. Non-inverting input – The input terminal to which the signal is applied and produces no phase shift at the output. F. Slew rate (SR) – The maximum rate of change of the output voltage under large signal input conditions.

One of the practical op-amp limitations is the rate at which the output voltage can change. The limiting rate of change for a device is called its "slew rate". The slew rate for the 741 is typically 0.5V/microsecond. Slew rate (SR) – The maximum rate of change of the output voltage under large signal input conditions. The indicated Slew rate amounts to V/µs

a. Inverting amplifier c. Voltage follower f. Integrating amplifier d. Summing Amplifier e. Difference amplifier b. Non-Inverting amplifier h. Comparator amplifier j. Potentiometric amplifier i. Schmidtt trigger g. Differentiating amplifier EO3 Given a circuit diagram explain the basic operation of the following Op-Amp configurations.

B. Basic Operation of the Inverting Amplifier Circuit has Zin = Ra, Low Zo, and phase inversion.

Inverting amplifier Since the resistance at the inverting terminal is very high, no current can flow through the inverting input. At the Rf / R1 junction the current in is the same as the current out. Therefore the current is the same through R1 and Rf. Kirchhoff I: I1 + I2 = 0 Substituting: Vin/R1 + Vout/Rf = 0 Rearranging: Vin /R1 = - Vout/Rf Therefore: Vout /Vin = - Rf/R1

Inverting Amplifier Input and Output Relationships

A. Basic Operation of the Non-Inverting Amplifier Circuit has Hi Zin, Low Zo, and no phase inversion. “Golden Rule” : In a feedback circuit the summing junction Value is driven to equal the reference junction value.

1. By assuming that the two input terminals are at the same potential and using Kirchhoff Current law for a series circuit. 2. We can write the equation for current through Rf and Ra as follows: Vout -Vin / Ra =Vin- 0/Rf We can therefore write: Vin = Vout __R1___ Rf + R1 Rearranging gives: Vout = Rf + R1 Vin R1 Therefore: Vout = 1 + Rf Vin R1

C. Basic Operation of the Voltage Follower Vout / Vin = 1 Circuit has Very Hi Zin, Low Zo, and no phase inversion.

Inverting amplifier SinceTypically a buffer amplifier is used to transfer a voltage from the first circuit, having a high output impedance level, to a second circuit with a low input impedance level. The interposed buffer amplifier prevents the second circuit from loading the first circuit unacceptably and interfering with its desired operation. If the voltage is transferred unchanged (the voltage gain is 1), the amplifier is a unity gain buffer; also known as a voltage follower. Although the voltage gain of a buffer amplifier may be (approximately) unity, it usually provides considerable current gain and thus power gain. However, it is commonplace to say that it has a gain of 1 (or the equivalent 0 dB), referring to the voltage gain.

D. Basic Operation of the Summing amplifier Summer with gain

E. Basic operation of the Difference Amplifier Eo = -R3/R1 e1 + (1+R3/R1)(R4/R2+R4) e2 Eo = e2 - e1 provided r1=r2=r3=r4

F. Integrating Amplifier

Integrating Amplifier In its simplest form the Integrating Amplifier has part of its’ input offset current charging the feedback capacitor, this can result in a constantly changing output even with no input called “integrator drift”. R2 is made large compared to Xc over the desired frequency range. The gain of the circuit to dc is limited to – R2/R1 thereby preventing drift into saturation which would occur if R2 were not present. In its simplest form the Integrating Amplifier has part of its’ input offset current charging the feedback capacitor, this can result in a constantly changing output even with no input called “integrator drift”. R2 is made large compared to Xc over the desired frequency range. The gain of the circuit to dc is limited to – R2/R1 thereby preventing drift into saturation which would occur if R2 were not present.

Integrating Amplifier R2 limits low frequency gain. Prevents Dc offset voltage from being integrated. Prevents Dc offset voltage from eventually saturating the amplifier. R3 limits the input bias current. Input bias current causes dc offset voltage. R3 = R1R2/R1+R2 If Fo>Fc =1/6.28R2 If Fo Fc =1/6.28R2 If Fo<Fc Av = -Vo/Vin=-(R2/R1) R1*C = 1/f

G. Differentiating Amplifier

Differentiating Amplifier A differentiator has a linear increase in gain with frequency, this characteristic can give poor noise performance. Since circuit gain increases with frequency, high frequency noise is amplified more than low frequency noise. If the output bandwidth is high very high noise levels may be produced. By choosing Xc1>> R1 and Xc2>>R2 the op amp will differentiate over the frequency range of interest, T=C1R2. At higher frequencies Xc1 and Xc2 are small compared to R1&R2 the gain becomes C2/r1 approaches 0. A differentiator has a linear increase in gain with frequency, this characteristic can give poor noise performance. Since circuit gain increases with frequency, high frequency noise is amplified more than low frequency noise. If the output bandwidth is high very high noise levels may be produced. By choosing Xc1>> R1 and Xc2>>R2 the op amp will differentiate over the frequency range of interest, T=C1R2. At higher frequencies Xc1 and Xc2 are small compared to R1&R2 the gain becomes C2/r1 approaches 0.

Differentiating Amplifier Vo = -R2C dVi/dVt Fo Fc Vo/Vin=-(R2/R1)

H. Comparator Amplifier A comparator circuit compares two voltage signals and determines which one is greater. The result of this comparison is indicated by the output voltage: if the op-amp's output is saturated in the positive direction, the noninverting input (+) is a greater, or more positive, voltage than the inverting input (-), all voltages measured with respect to ground. If the op-amp's voltage is near the negative supply voltage (in this case, 0 volts, or ground potential), it means the inverting input (-) has a greater voltage applied to it than the noninverting input (+).

The non-inverting input is at 2.5 V -- we'll call this the threshold voltage. Whenever the input voltage is below the threshold voltage, the output is high. Since the output is effectively an open circuit, no current flows, so there is no voltage across R3, and the output voltage is 5 volts. When the input is above the threshold, the output is low. This is illustrated in the diagram below. H. Comparator Amplifier

The schematic for a Schmitt trigger is given above. When the output is high, the threshold voltage will be 2.5 volts, and when it is low, the threshold voltage is 1.67 (=5/3) volts (figure it out). This creates two separate thresholds. If we apply the same input to this new circuit, we now get one transition of the output, because of the changing threshold voltage. (When the output is high, the threshold is high -- when the output is low, the threshold is low). Note that the output now only goes up to 2.5 volts. I. Schmidt trigger

J. Potentiometric Amplifier

Potentiometric Amplifier This is a special configuration of Inverting amplifier. Used when Rin needs to be Hi and gain needs to be Hi. Solves problems with noise and frequency response. Allows use of smaller Rfb. Voltage gain Av (Rfb>R1) Vo/Vin =Rfb/Rin[(R1/R2+1] Potentiometer provides variable amount of signal feedback.