The Tablet PC at Five Chuck Thacker Distinguished Engineer Microsoft Corporation July 20, 2005.

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Presentation transcript:

The Tablet PC at Five Chuck Thacker Distinguished Engineer Microsoft Corporation July 20, 2005

Talk outline Tablet history The Tablet today Tablet futures Limits on computers –What Moore actually said. –Implications for computers. –Other limits What about software? Conclusions

Prehistory – before 2000 Lots of earlier attempts – mostly failures. –DEC, Go, Newton, Pen Windows Technology wasn’t ready But vertical markets had limited success. Needed: better UI, better handwriting recognition (without relying on it). Key: Better digitizer (with hover).

An earlier attempt TRS 80 Model 100 Reporters and students loved it Ran for days on AA cells Solved most computing needs for its (low aspiration) users.

Another attempt DEC Lectrice 5.5 pounds 1.5 hour battery Wireless network $5K LCD panel VxWorks OS, X11 server optimized for reading

Microsoft proof of concept –Transmeta TM5800 –256MB DRAM, 20GB HDD –10.4” Slate Good points: –Proved viability –Pushed the Power Efficiency Envelope 5 Hours runtime, 200 Hours standby –Provided a development platform to get MS to Tablet PC launch. On the Other Hand: –It was so sloooooow Where we started: Internal MS (1999)

Today’s Market: New Slates Sahara i ”, 1.6GHz Centrino Motion Computing Tatung TTAB 10.4”, 1 GHz ULV Tatung B12D 12.1” 1.2 GHz Centrino Fujitsu /12.1, Indoor/Outdoor 1.1 GHz ULV NEC VersaPro, 10.4”, 1.1 GHz LE 1600 LS 800

Today’s Market: New Convertibles Acer C1xx C300 C250 Averatec C3500 AMD ”, DVD Electrovaya 1.4 GHz Centrino 12.1”, Biometrics Scribbler SC-2200 Gateway M ”, DVD 1.8 GHz Pentium-M SHARP Actius TN10W 12.1”, 1.1 GHz Toshiba M200, 12.1” SXGA+ 2 GHz Pentium-M ViewSonic 12.1”, 1 GHz Fujitsu T4000 IBM ThinkPad x41 HP tc4200

Today’s Market: New Hybrids & Ruggeds HP Compaq TC1100ULV Celeron or Pentium 10.4”, 1.1 GHz Walkabout Hammerhead 10.4”, 4.5 lbs 933 MHz P-III M Hybrid Ruggedized Itronix 8.4”, 933 MHz ULV Xplore iX ” 1.1 GHz ULV

Concept Design: New hinge

A Concept Tablet for Kids Low power – (7W) 8.4” display Tethered pen Rugged

Other Form Factors Vulcan FlipStart OQO Model 1

Today’s Market: Forecasts Mobile Market Projections (IDC) Ultra-Portable 1 or 2 spindle,10-12” screen, 2-4 lbs. Ultra-Mobile 0 to 1 spindle, 5-8” screen, < 2 lbs. Thin & Light 2 spindle, 14-15” screen, 4-7 lbs. Transportable 2 & 3 spindle, 14-17” screen, 7-12 lbs. 0% 0% 8% 8% 30% 30% 2004 Market share 63% 63% 1% 1% 17% 17% 19% 19% 2006 Market share 63% 63% 3% 3% 31% 31% 10% 10% 2008 Market share 56% 56% Consumers, Mobile Professionals CY08 Market: 2.5M, CAGR (04-08): 40% Mobile Professionals, Information Workers CY08 Market: 28.4M, CAGR (04-08): 51.4%, Information Workers, Consumers CY08 Market: 51M, CAGR (04-08): 22% Information Workers, Consumers CY08 Market: 8.9M, CAGR (04-08): -11% Data source: IDC

Moore’s Law (1967) Not really a “law”, but an observation, intended to hold for “..the next few years”. (Nt/A)(t1) = (Nt/A)(t0) * 1.58 t1-t0 (t in years) Most exponential curves in the real world turn out to be “S” shaped, but Moore’s observation has held for 35 years.

The Woolly Bear Book of VLSI scaling Scaling requires lithography and process changes. Get more and faster transistors in the same area. Power per transistor goes down, power per unit area goes up (sometimes way up). Power ≈ CV 2 f (plus leakage)

How to use Moore’s Law Lower cost: Same Nt, reduced A (“die shrinks”) used in video consoles. More complex chips: Larger Nt, same A. –Lower the voltage and increase frequency –Add larger caches to overcome latency –Add architectural features to increase ILP Superchips (SOC): Increase Nt and A.

Moore’s Law for Memory Capacity improvement: 1,000,000 X since Bandwidth improvement: 100 X. Latency reduction: only X. –Dealing with latency is the largest problem for a computer system designer.

Moore’s Law for Processors More complex designs More than one processor on a chip (homogeneous). More than one processor, with specialized functions, e.g. graphics –Graphics performance is improving much faster than CPU performance.

Thirty years of progress ItemAlto, 1972 MS Tablet 2002 Factor CPU clock rate6 MHz600 MHz100 Memory size128 KB256 MB2000 Memory access time 850 ns100 ns8.5 Display pixels606 x 808 x 1768 x 1024 x (x16) Network3 Mb Ethernet100 Mb Ethernet30 Disk capacity2.5/5 MB6 GB2400/1200

Possible Future Limits Physical limits: –“Atoms are too large, and light is too slow” –Today, the problem isn’t making the transistors faster, it’s the time for signals to propagate on the wires (latency again). –Power. Lots of transistors => lots of power. Cooling is hard. Design complexity: –Designing a billion-transistor chip takes a large team, even with good design tools. –The “junk DNA” problem. Economics: –Factories are very expensive.

Scaling Limits Voltage scaling is about over. It’s very hard to operate below 1 volt. Frequency increases are also difficult. –Intel runs out at 3 – 4 GHz. Static leakage is also a big problem. So, we’ll see more transistors in the future, but they won’t be better or faster transistors.

Future processors We’ll see chips with many processor cores. Each core will be simpler than today’s superscalar machines. Probably hyperthreaded, to hide latency. Optimized to increase thread-level parallelism, rather than instruction-level parallelism. The story about caching is very unclear… See Intel’s “Platform 2015” white papers.

Other Limits Not all technologies used in computers follow Moore’s Law –Disks don’t –Displays don’t –Batteries don’t The bandwidth vs. latency problem. –See D. Patterson, “Latency Lags Bandwidth”, CACM, October 2004

What about software? For scientific computing and servers, the future seems fine. –There are lots of important problems that are embarrassingly parallel. For client software, the picture is more bleak.

Many-core challenges for clients Windows doesn’t use threads well –Exceptions: Kernel, SQL –Competitors don’t do any better Applications don’t use threads well –Outlook is the poster child –Until recently, inking on Tablet was problematic Problems: –Writing multi-threaded code is hard –Threading model and primitives are overly complicated –Threads don’t compose –Debugging multi-threaded code is harder –Testing multi-threaded code is a crapshoot –Tool support isn’t very good

Possible paths forward Better language support for parallelism –Cω, Atomic transactions Better tools –Analyze liveness and safety statically –Model checking –Dynamic race detection Better libraries Better education

Conclusions Popularity of portable devices, including Tablet PC, is growing Much of the innovation in the industry is in this area. Energy-efficiency can open up new markets. Silicon trends favor the high end There are lots of challenges and opportunities for new software.