Copier Jam Detector Design Problem Digital Electronics 2.5 Programmable Logic - Combinational Introduction to Sensors and Motors: Copier Jam Detector DMS-VEX or DLB-VEX Digital Electronics © 2014 Project Lead The Way, Inc. Project Lead The Way, Inc. Copyright 2009

Design Specifications Copier Jam Detector Design Problem Digital Electronics 2.5 Programmable Logic - Combinational As the paper passes through a copy machine, three sensors monitor its path. The sensors are switches that are internally wired as Normally Open. Motor Sensor C Sensor B Sensor A Paper Path Test fixture constructed with VEX® components. Project Lead The Way, Inc. Copyright 2009

Design Specifications Copier Jam Detector Design Problem Digital Electronics 2.5 Programmable Logic - Combinational When paper makes contact with the switch, the switch outputs a logic one (1). When paper is not present, the switch outputs a logic zero (0). If a jam occurs, the feed motor will stop. Switch Paper Paper = Logic 1 No Paper = Logic 0 Project Lead The Way, Inc. Copyright 2009

Design Specifications Copier Jam Detector Design Problem Design Specifications Digital Electronics 2.5 Programmable Logic - Combinational Under normal operations, paper will pass through the sensors such that adjacent sensors will not simultaneously detect paper. If they detect paper, this indicates that a paper jam has occurred. Shown are a few examples of both Jam and No Jam conditions. No Jam Jam Jam No Jam Project Lead The Way, Inc. Copyright 2009

Design Specifications Copier Jam Detector Design Problem Digital Electronics 2.5 Programmable Logic - Combinational When a paper jam occurs, an LED indicator light will turn on (and/or a buzzer will sound). The LED indicator will go off as soon as the jam is cleared. Motor Signal JAM Signal CLEAR Signal Use of a buzzer is optional. The buzzer should continue to sound until a Clear button is pressed. This last condition requires that the output controlling the buzzer be latched with a flip-flop. Project Lead The Way, Inc. Copyright 2009

Design Challenges: CMOS vs TTL Copier Jam Detector Design Problem Design Challenges: CMOS vs TTL Digital Electronics 2.5 Programmable Logic - Combinational The Cmod-S6 PLD, the Digital Logic Board (FPGA), and VEX limit switches are all designed for CMOS not TTL. This means that the inputs to both these FPGA’s should be kept ideally near 3.3V rather than 5V to protect the hardware and for them to work with VEX limit switches. Note: some pins on the DLB are not 5V tolerant and require that the voltage be lowered to 3.3V or it will damage the board. Older DLB’s may have a 3.3V option. The new Digital Protoboard also has a 3.3 V option when using Vext. -Pictured above Regardless what development board you are using we will assume that the power rail are providing 5V so that we may learn about voltage dividers. Project Lead The Way, Inc. Copyright 2009

Design Strategy: Voltage Dividers Copier Jam Detector Design Problem Digital Electronics 2.5 Programmable Logic - Combinational One way to reduce the 5V provided to the 3.3V desired is to use a voltage divider. A voltage divider is a linear circuit that produces an output voltage which is a fraction of the input voltage. (See schematic below.) R1 R2 Project Lead The Way, Inc. Copyright 2009

Design Strategy: Pull Down Resistors Copier Jam Detector Design Problem Design Strategy: Pull Down Resistors Digital Electronics 2.5 Programmable Logic - Combinational Another way to help distinguish between a high or low signal at the inputs is to use pull down resistors. Pull down resistors hold the logic signal near zero when no other active device is connected. As one, then two, then three limit switches are activated, the output voltage will vary slightly. If the change is large enough, the circuit will not perform as expected. The 100K pull down resistors help maintain the voltage levels within a range that allows the circuit to perform as expected. (note: The resistor values were chosen to provide a “stiff” voltage divider. Other values could be used. Project Lead The Way, Inc. Copyright 2009

Design Strategy: Switches Copier Jam Detector Design Problem Design Strategy: Switches Digital Electronics 2.5 Programmable Logic - Combinational The red wire on the switch is not connect inside. The switch is wired as a SPDT using only the black and white wires. As one, then two, then three limit switches are activated, the output voltage will vary slightly. If the change is large enough, the circuit will not perform as expected. The 100K pull down resistors help maintain the voltage levels within a range that allows the circuit to perform as expected. (note: The resistor values were chosen to provide a “stiff” voltage divider. Other values could be used. Project Lead The Way, Inc. Copyright 2009

Design Challenges: Motors Copier Jam Detector Design Problem Design Challenges: Motors Digital Electronics 2.5 Programmable Logic - Combinational Motors and other devices often require more than the 5V used in TTL logic to power them. In this case, the VEX 2-Wire Motor 393 requires 6V to operate. It is often wise to ensure that the power being supplied to the PLD (or other controller) is NOT the same power supply being used to drive the motor. This protects your circuit design from inadvertently being powered by more than 5V (damaging the circuit). Also, as a motor acts as a load in the circuit, it can vary the voltage level and disrupt your logic design if the two were to be powered by the same source. Project Lead The Way, Inc. Copyright 2009

Design Strategy: H-Bridge Drivers Copier Jam Detector Design Problem Digital Electronics 2.5 Programmable Logic - Combinational Aside from keeping the motor voltage source separate from the logic voltage source, in future designs we will want motors to move in both directions. An H bridge is an electronic circuit that enables a voltage to be applied across a load in either direction. Project Lead The Way, Inc. Copyright 2009

Copier Jam Detector Design Problem Wiring the SN754410 Copier Jam Detector Design Problem Digital Electronics 2.5 Programmable Logic - Combinational Project Lead The Way, Inc. Copyright 2009

Complete Block Diagram Copier Jam Detector Design Problem Digital Electronics 2.5 Programmable Logic - Combinational Note: The Cmod-S6 and H-Bridge should Project Lead The Way, Inc. Copyright 2009

Challenge: Copier Jam Detector Copier Jam Detector Design Problem Digital Electronics 2.5 Programmable Logic - Combinational Design Specifications: The copier jams only when 2 adjacent inputs are triggered. The MOTOR output should remain on until the copier jams. The LED should remain on and the MOTOR off until the CLEAR pushbutton is pressed. This will require the pushbutton be latched with a flip-flop. The design should include pull down resistors. The design should include a voltage divider to change the signal voltage from 5V to 3.3V. The design should include a SN754410 Quadruple Half-H Driver or L298 Full Bridge Driver and a 6V external voltage source to drive the motor. Project Lead The Way, Inc. Copyright 2009

Challenge: Copier Jam Detector Copier Jam Detector Design Problem Digital Electronics 2.5 Programmable Logic - Combinational Challenge: DMS-VEX myDAQ supplying 5V to the Digital Protoboard SN754410 Quadruple Half-H Driver (4) AA batteries supplying 6V to the Motor Project Lead The Way, Inc. Copyright 2009