11/17/04VLSI Design & Test Seminar: Spectral Testing 1 Spectral Testing Vishwani D. Agrawal James J. Danaher Professor Dept. of Electrical and Computer.

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11/17/04VLSI Design & Test Seminar: Spectral Testing 1 Spectral Testing Vishwani D. Agrawal James J. Danaher Professor Dept. of Electrical and Computer Engineering Auburn University, Auburn, AL

11/17/04VLSI Design & Test Seminar: Spectral Testing 2 Basic Idea Meaningful inputs (e.g., test vectors) of a circuit are not random. Input signals must have spectral characteristics that are different from white noise (random vectors).

11/17/04VLSI Design & Test Seminar: Spectral Testing 3 History of this Work Class project, Spring 1999: Develop an ATPG program using vector compaction. Determination of input weights had limited success for combinational circuits and no success for sequential circuits. Combinational ATPG improved when input correlations were considered (space correlation). Sequential ATPG required both spatial and time correlation.

11/17/04VLSI Design & Test Seminar: Spectral Testing 4 References: Books H. F. Harmuth, Transmission of Information by Orthogonal Functions, New York: Springer-Verlag, S. L. Hurst, D. M. Miller and J. C. Muzio, Spectral Techniques in Digital Logic, London: Academic Press, A. V. Oppenheim, R. W. Schafer and J. R. Buck, Discrete-Time Signal Processing, Englewood Cliffs, New Jersey, Prentice Hall, M. A. Thornton, R. Drechsler and D. M. Miller, Spectral Techniques in VLSI CAD, Boston: Kluwer Academic Publishers, 2001.

11/17/04VLSI Design & Test Seminar: Spectral Testing 5 References: Papers A. K. Susskind, “Testing by Verifying Walsh Coefficients,” IEEE Trans. Comp., vol. C- 32, pp , Feb T.-C. Hsiao and S. C. Seth, “The Use of Rademacher-Walsh Spectrum in Random Compact Testing,” IEEE Trans. Comp., vol. C-33, pp , Oct S. Sheng, A. Jain, M. S. Hsiao and V. D. Agrawal, “Correlation Analysis for Compacted Test Vectors and the Use of Correlated Vectors for Test Generation,” IEEE International Test Synthesis Workshop, A. Giani, S. Sheng, M. S. Hsiao and V. D. Agrawal, “Efficient Spectral Techniques for Sequential ATPG,” Proc. IEEE Design & Test (DATE) Conf., March 2001, pp A. Giani, S. Sheng, M. S. Hsiao and V. D. Agrawal, “Novel Spectral Methods for Built-In Self-Test in a System-on-a-Chip Environment,” Proc. 19 th IEEE VLSI Test Symp., Apr.- May 2001, pp A. Giani, S. Sheng, M. Hsiao and V. D. Agrawal, “Compaction-Based Test Generation Using State and Fault Information,” J. Electronic Testing: Theory and Applic., vol. 18, no. 1, pp , February O. Khan and M. L. Bushnell, “Spectral Analysis for Statistical Compaction During Built-In Self-Testing,” Proc. International Test Conf., Oct. 2004, pp J. Zhang, M. L. Bushnell and V. D. Agrawal, “On Random Pattern Generation with the Selfish Gene Algorithm for Testing Digital Sequential Circuits,” Proc. International Test Conf., Oct. 2004, pp

11/17/04VLSI Design & Test Seminar: Spectral Testing 6 Statistics of Test Vectors b c a a b c % coverage Tests: Test vectors are not random: 1.Correlation: a = b, frequently. 2.Weighting: c has more 1s than a or b.

11/17/04VLSI Design & Test Seminar: Spectral Testing 7 Vectors for ALU Twelve vectors: % 1’s

11/17/04VLSI Design & Test Seminar: Spectral Testing 8 TLC Circuit: s298 Test vector sequence: 000repeat 3 times 001repeat 8 times 000repeat 39 times 010repeat 17 times 000repeat 24 times 001repeat 5 times repeat 3 times 000repeat 17 times

11/17/04VLSI Design & Test Seminar: Spectral Testing 9 Spectrum of a Bit-Stream Hadamard matrix of order k gives bases for bit-streams of length 2 k. Example: k= –1 1 1 –1 –1 1 –1 – = H(k) x C = k.B

11/17/04VLSI Design & Test Seminar: Spectral Testing 10 Filtering Noise Determine coefficient matrices for the input bit-streams. Eliminate minor (small) coefficients. Multiply modified coefficients with Hadamard matrix to obtain the filtered bit-streams.

11/17/04VLSI Design & Test Seminar: Spectral Testing 11 Spectral ATPG Initial vectors (random) Fault simulation and vector- compaction Fault coverage ? Compute spectral coefficients Add filtered vectors to test set Stop low ok

11/17/04VLSI Design & Test Seminar: Spectral Testing 12 Spectral ATPG Det vec CPU s ATPG RESULTS Strategate Det vec CPU s HITEC Det vec CPU s Circuit name s5378 b12 CPU: Ultra Sparc 10 HITEC: Nierman and Patel, EDAC’91 Strategate: Hsiao et al., ACMTDAES’00 Proptest: Guo et al., DAC’99 Proptest Det vec CPU s Ref: Giani et al., DATE ’02

11/17/04VLSI Design & Test Seminar: Spectral Testing 13 ATPG for b Number of iterations Faults detected Spectral ATPG Proptest

11/17/04VLSI Design & Test Seminar: Spectral Testing 14 Spectral Self-Test TPG Compute spectral coefficients for given test vectors. Save major coefficients. Generate tests by multiplying saved coefficients with Hadamard matrix. TPG may be implemented in software or hardware.

11/17/04VLSI Design & Test Seminar: Spectral Testing 15 SOC Self-Test Application Circuit name s5378 b12 Total faults Weighted-random patterns Ideal Rounded Spectral patterns Number of patterns = 70,000 Detected faults Ref: Giani et al., VTS ‘01

11/17/04VLSI Design & Test Seminar: Spectral Testing 16 Self-Test Signature Susskind, FTCS ’81, IEEETC ’83 Match Walsh coefficient of input vector with output. Compute number of times output matches minus #mismatches for C 0 – first Walsh coefficient (counting 1’s or syndrome) C all – highest order Walsh coefficient, 0(1) for odd(even) number of zeros in the input vector

11/17/04VLSI Design & Test Seminar: Spectral Testing 17 Susskind’s Response Compactor CUT TPG Response counter 1 C all Output Signature Reset-start/stop C0C0

11/17/04VLSI Design & Test Seminar: Spectral Testing 18 Matching Output to Tone Khan and Bushnell, ITC ’04 Susskind’s C 0 is DC, Tones are: Empirical result: Zero aliasing in benchmark circuits when two tones are matched separately for each output.

11/17/04VLSI Design & Test Seminar: Spectral Testing 19 Transfer Function Characterize digital circuit in frequency domain by a transfer function. Y(ω) = H(ω) X(ω) H(ω) X(ω) Y(ω)

11/17/04VLSI Design & Test Seminar: Spectral Testing 20 Circuit 1: Non-Oscillatory Behavior FF Non-oscillatory steady-state output is due to a feedback free structure.

11/17/04VLSI Design & Test Seminar: Spectral Testing 21 Circuit 2: Oscillatory Behavior FF Oscillatory steady-state output is due to the feedback structure. Natural frequency Characteristic input

11/17/04VLSI Design & Test Seminar: Spectral Testing 22 Some Observations Feedback free circuit Like simple filter. May pass some frequencies and block others. Fixed inputs produce a transient output followed by a fixed steady state output. Maximum duration of transient is determined by the sequential depth of the circuit. Combinational circuit is similar. Testing or verification may be possible by examining the pass and stop bands. A complete characterization of transfer function may lead to new methods of synthesis.

11/17/04VLSI Design & Test Seminar: Spectral Testing 23 More Observations Circuit with feedback Like a complex filter may pass some frequencies and block others. Fixed input can produce either a transient or oscillatory (natural frequency) output (poles in the transfer function?) Fixed inputs (characteristic vectors) that produce output oscillation may have test and verification significance. Natural frequencies can be determined from the lengths of feedback cycles.

11/17/04VLSI Design & Test Seminar: Spectral Testing 24 Conclusion A vector sequence is efficiently represented by its spectral coefficients. Spectral analysis is useful in ATPG and BIST. Spectral TPG synthesis is an open problem. A digital circuit is a filter: Output spectrum for random inputs is the impulse response. Analysis of impulse response may lead to suitable input spectrum for test and verification. Useful (?) characteristics are natural or resonance frequencies, characteristic vectors, transient behavior.