University of Kansas Research Interests David Andrews Rm. 324 Nichols 864-7743.

Slides:



Advertisements
Similar presentations
I/O Organization popo.
Advertisements

Communication-Avoiding Algorithms Jim Demmel EECS & Math Departments UC Berkeley.
EZ-COURSEWARE State-of-the-Art Teaching Tools From AMS Teaching Tomorrow’s Technology Today.
1 (Review of Prerequisite Material). Processes are an abstraction of the operation of computers. So, to understand operating systems, one must have a.
Structure of Computer Systems
Lecture 9: Coarse Grained FPGA Architecture October 6, 2004 ECE 697F Reconfigurable Computing Lecture 9 Coarse Grained FPGA Architecture.
Robert Barnes Utah State University Department of Electrical and Computer Engineering Thesis Defense, November 13 th 2008.
1 Microprocessor-based Systems Course 4 - Microprocessors.
Embedded Systems Programming
Multiprocessors ELEC 6200: Computer Architecture and Design Instructor : Agrawal Name: Nam.
Supporting Systolic and Memory Communication in iWarp (Borkar et al. 1990) presented by Vasily Volkov CS258, Spring 2008, UC Berkeley.
Multithreading and Dataflow Architectures CPSC 321 Andreas Klappenecker.
Embedded Computing From Theory to Practice November 2008 USTC Suzhou.
Murali Vijayaraghavan MIT Computer Science and Artificial Intelligence Laboratory RAMP Retreat, UC Berkeley, January 11, 2007 A Shared.
Introduction to Parallel Processing Ch. 12, Pg
Flynn’s Taxonomy of Computer Architectures Source: Wikipedia Michael Flynn 1966 CMPS 5433 – Parallel Processing.
Computer Architecture Lecture 01 Fasih ur Rehman.
Computer System Architectures Computer System Software
LIGO-G Z 8 June 2001L.S.Finn/LDAS Camp1 How to think about parallel programming.
Revised: Aug 1, ECE 263 Embedded System Design Lesson 1 68HC12 Overview.
CS668- Lecture 2 - Sept. 30 Today’s topics Parallel Architectures (Chapter 2) Memory Hierarchy Busses and Switched Networks Interconnection Network Topologies.
Exercise 2 The Motherboard
ECEn 191 – New Student Seminar - Session 9: Microprocessors, Digital Design Microprocessors and Digital Design ECEn 191 New Student Seminar.
Main Memory -Victor Frandsen. Overview Types of Memory The CPU & Main Memory Types of RAM Properties of DRAM Types of DRAM & Enhanced DRAM Error Detection.
Chapter 2 Parallel Architecture. Moore’s Law The number of transistors on a chip doubles every years. – Has been valid for over 40 years – Can’t.
Heterogeneous Multikernel OS Yauhen Klimiankou BSUIR
An Overview of Parallel Computing. Hardware There are many varieties of parallel computing hardware and many different architectures The original classification.
Rethinking Computer Architecture Wen-mei Hwu University of Illinois, Urbana-Champaign Celebrating September 19, 2014.
Copyright © 2007 Heathkit Company, Inc. All Rights Reserved PC Fundamentals Presentation 3 – The Motherboard.
General Concepts of Computer Organization Overview of Microcomputer.
Areas of Computing Study. Artificial Intelligence Databases and Data Science Human-Centered Computing Networking Information Security System Software.
Flynn’s Architecture. SISD (single instruction and single data stream) SIMD (single instruction and multiple data streams) MISD (Multiple instructions.
MAPLD 2005/254C. Papachristou 1 Reconfigurable and Evolvable Hardware Fabric Chris Papachristou, Frank Wolff Robert Ewing Electrical Engineering & Computer.
Orange Coast College Business Division Computer Science Department CS 116- Computer Architecture Multiprocessors.
Introduction to Computer Organization
A few issues on the design of future multicores André Seznec IRISA/INRIA.
Authors – Jeahyuk huh, Doug Burger, and Stephen W.Keckler Presenter – Sushma Myneni Exploring the Design Space of Future CMPs.
Heterogeneous Technology Alliance Photonic on Silicon : Electro-optical links for massively parallel multiprocessors systems- in-package.
Computer Architecture 2 nd year (computer and Information Sc.)
Advanced Signal Processing Systems and Applications Main research areas Applications Applications –biomedical, media, communications, security Algorithms.
12/13/ _01 1 Computer Organization EEC-213 Computer Organization Electrical and Computer Engineering.
ECEn 191 – New Student Seminar - Session 6 Digital Logic Digital Logic ECEn 191 New Student Seminar.
1 Basic Components of a Parallel (or Serial) Computer CPU MEM CPU MEM CPU MEM CPU MEM CPU MEM CPU MEM CPU MEM CPU MEM CPU MEM.
Computer performance issues* Pipelines, Parallelism. Process and Threads.
Von Neumann Computers Article Authors: Rudolf Eigenman & David Lilja
Lecture 3: Computer Architectures
HOW COMPUTERS WORK THE CPU & MEMORY. THE PARTS OF A COMPUTER.
Computer Architecture Lecture 24 Parallel Processing Ralph Grishman November 2015 NYU.
Euro-Par, HASTE: An Adaptive Middleware for Supporting Time-Critical Event Handling in Distributed Environments ICAC 2008 Conference June 2 nd,
CDA-5155 Computer Architecture Principles Fall 2000 Multiprocessor Architectures.
Background Computer System Architectures Computer System Software.
Chapter 11 System Performance Enhancement. Basic Operation of a Computer l Program is loaded into memory l Instruction is fetched from memory l Operands.
Computer Architecture: Multi-Core Processors: Why? Prof. Onur Mutlu Carnegie Mellon University.
Compiler Research How I spent my last 22 summer vacations Philip Sweany.
Hardware Architecture
System on a Programmable Chip (System on a Reprogrammable Chip)
buses, crossing switch, multistage network.
Presented by: Tim Olson, Architect
Architecture Background
Buses.
Introduction to Computing
ESE 566: Hardware/Software Co-Design of Embedded Systems Fall 2005  Instructor: Dr. Alex Doboli. Paper discussed in class: H. Singh, M.-H. Lee, G. Lu,
Real-Time Systems Group
Accelerating Approximate Pattern Matching with Processing-In-Memory (PIM) and Single-Instruction Multiple-Data (SIMD) Programming Damla Senol Cali1 Zülal.
Coe818 Advanced Computer Architecture
buses, crossing switch, multistage network.
Introduction to Heterogeneous Parallel Computing
Graphics Processing Unit
Lesson Objectives A note about notes: Aims
Substation Automation IT Needs
Presentation transcript:

University of Kansas Research Interests David Andrews Rm. 324 Nichols

University of Kansas Agenda Background Research Interests

University of Kansas Background Research Engineer General Electric Electronics Laboratory –R & D For GE’s Aerospace Business Group –Area: Parallel And Distributed Embedded Systems –Expertise: Chip/Board/System (Architecture&Algorithm) Design Space Based, Ground Based, Underwater Signal Processing, Communications Systems –Projects: Strategic Defense Initiative (SDI) AWACS Re-Design First Dual Fetch RISC CPU Underwater Systems Division –Systems Architecture, Operating System For Seawolf Submarine

University of Kansas Background University of Arkansas Architecture –Parallel Processing Systems –Systems: Image/Data/Signal Processing SIMD Arrays, Systolic Arrays, Multiprocessors Database Accelerator: FPGA Accelerator –Component Research –CPU: Processor In Memory (PIM) CPU Core Integrated With DRAM Reconfigurable Processing –Cache: Redesign Caching –Multichip Modules (MCM) –Systems On A Package Administrative Duties

University of Kansas Current Interests Networked Embedded Systems Large Real Time Systems –Heterogeneous “Parallel” Nodes –Node Architectures –Computing Paradigms Computer Architecture Data Intensive Architectures –Scalar, Parallel CPU Cores, Caches –Asynchronous Systems, Optical Systems Future Paradigms

University of Kansas Networked Embedded Systems Autonomous “networked” Embedded Systems –Embedded Systems Much More Than Closed Loop Periodic Systems –Dynamic Operation of Real Time Networks Network Key To New Embedded Systems Data Sharing/Service Co-ordination –System Resource Management Dynamic Workloads Fault Detection/Location Things break –Models For Data Acquisition and Transfer –Very Dynamic Data Transmission Requirements –Variable Communications Bandwidth Requirements –Buffering

University of Kansas Example Autonomous System

University of Kansas Computer Architecture General Movement to Systems On A Chip Integration of Analog/Digital Data Intensive Architectures –Processor In Memory Approach –D-Base, Multimedia Applications –Low Level Communications Future Paradigms –Instruction Set Architecture (ISA) Definition –“old” ISA is well… Old…. Von Neumann Load/Store –Asynchronous Paradigm Is Also Interesting