A few numbers. kT/C noise: limits the dynamic range Sampling capacitor: 60 fF (seen by the switch, post-layout) kT/C = sqrt(1.38 10 -23 * 300K * 60fF)

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Presentation transcript:

A few numbers

kT/C noise: limits the dynamic range Sampling capacitor: 60 fF (seen by the switch, post-layout) kT/C = sqrt( * 300K * 60fF) = 262  V One 8-bit LSB is 4mV ok. Analog bandwidth: limits the timing resolution Analog pad capacitance: post-layout 100fF… (?) We believe it’s more… If 100fF, no impact on the analog bandwidth since 1/2  RC = 30GHz. Could be 3pF… RC of the sampling cap: Assume R= 1k  RC = 2.6 GHz, ok. Sampling cap leaks: limit the readout time 600pA (from simulations) on sampling cell cap One 8-bit LSB drop being 1/256 = 4mV,  t = 4mV x 60 fF/600pA = 0.4  s Digitization takes at more 3  s. The drop will be an error of 8 LSBs at more, for which we can calibrate, since the digitization time is known.

A few useful numbers kT/C noise

Analog bandwith for sampling rate 4-10 GS/s Data taken at Argonne with 10um MCP, 2.5kV, 158PEs

At 1GHz analog bandwidth: bits 2GS/s 5GS/s 10GS/s ps 3.1ps 2.8ps 9 4.2ps 3.2ps 2.6ps 8 4.2ps 3.1ps 2.8ps 7 4.0ps 3.1ps 2.9ps 6 4.5ps 3.3ps 3.2ps 5 4.8ps 3.5ps 3.7ps 4 8.5ps 6.1ps 5.9ps Number of bits, sampling rate: Timing resolution Data taken at Argonne with 10um MCP, 2.5kV, 158PEs, 8-bit oscilloscope