Digital Guitar Recorder Team RAD – Michael McGuirk, Nick Herrera, David Wormus, Fesehaye G. Abrhaley

Primary Project Objectives Record analog guitar waveform to non-volatile solid state memory Ability to add guitar effects to analog waveform before recording Have simultaneous play-through and recording capability Utilize Xilinx XCV1000 FPGA for processing needs and control of peripheral logic Ability to store multiple track files, files stored in WAV format

Secondary Project Objectives Ability to layer multiple tracks into one file Store file with audio compression as MP3 file Incorporate and RS-232 data link Create a rechargeable battery system to power recorder for 3-5 hours

High-level Project Implementation

Analog Guitar to Digital Data Low voltage guitar signal input Signal effects processing Signal conditioning to match A/D converter’s needs A/D controlled by main controller Data passed to FIFO and WAV formatter

High-level Project Implementation

Compact Flash Controller / WAV Formatter and FIFO Reads data from A/D converter into FIFO Adds WAV file header and footer to data Writes and reads data to and from compact flash with a FAT16 file system

High-level Project Implementation

Main Controller Receives and issues control signals to all functional blocks Accepts input from user interface Implemented using soft processor core or VHDL

High-level Project Implementation

User Interface/LCD 5-way button for Record, Play,Stop, Track Select, ON/OFF Backlit 20-digit LCD displays current mode (play etc.) and track numbers. LCD controller is on FPGA written in VHDL

High-level Project Implementation

Digital Playback and Analog Output Data is buffered from FIFO into D/A during playback off of C.F. Simultaneous output from guitar  out and D/A  out. Audio amplifier is transistor based.

High-level Project Implementation

Power Regulated 3.3 and 2.5 V power buses from an 9V AC adapter. 3.3 V – Compact Flash – A/D and D/A converters – LCD – Data lines to and from FPGA 2.5 V – FPGA Vcc 9V DC for audio amplifier for gain.

Risk and Contingency Plan RISKS – No previous experience with Compact Flash or FAT file systems. – Adapting soft cores (LCD controller, Flash, 8051(?), FAT16) to our specifications. – File formatting problems due to length of recording Contingency Plan – Use SDRAM w/ RS-232 instead of Compact Flash. – Use an 8051 processor if FPGA doesn’t work out. – Use fixed file lengths

Division of Labor

Schedule

QUESTIONS A Team Rad Production January 27, 2004