1 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Exploration of Embedded Systems © Lothar Thiele ETH Zurich

2 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Basic Models and Methods Modular Performance Analysis Multi-Criteria Optimization Applications Concluding Remarks

3 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Target Platform Heterogeneous computing and memory resources some resource types: GP processors, ASIPs (DSP, micro-controller), weakly programmable co- processors, re-configurable components, hard coded IP components heterogeneous platform software: RTOS, scheduling (pre-emptive, static, dynamic), synchronization DSP CC CC image coprocessor CAN interface SDRAM RISC FPGA

4 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Target Platform Communication micro-network on chip for synchronization and data exchange consisting of busses, routers, drivers some critical issues: topology, switching strategies (packet, circuit), routing strategies (static – reconfigurable – dynamic), arbitration policies (dynamic, TDM, CDMA, fixed priority) challenges: heterogeneous components and requirements, compose network that matches the traffic characteristics of a given application (domain)

5 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Scheduling/Arbitration proportional share WFQ staticdynamic fixed priority EDF TDMA FCFS Communication Templates Architecture # 1 Architecture # 2 Computation Templates DSP EE Cipher SDRAM RISC FPGA LookUp DSP TDMA Priority EDF WFQ RISC DSP LookUp Cipher EE EE EE EE EE EE static Which architecture is better suited for our application?

6 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Exploration ApplicationArchitecture Mapping Analysis This process takes place on several levels of abstraction.

7 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Exploration ApplicationArchitecture Mapping Analysis This talk: Exploration and Analysis on a high level of abstraction.

8 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Exploration ApplicationArchitecture Mapping Analysis (Semi-) Automated Design Space Exploration This talk: Exploration and Analysis on a high level of abstraction.

9 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Why is Performance Analysis Difficult? complex behavior - input stream - data dependent behavior I/O DSP CPU1 CPU2 task 1 task 2 task 3 task 4 interference - limited resources - scheduling/arbitration interference of multiple applications - limited resources - scheduling/arbitration - anomalies

10 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Simulation Target architecture co-simulation combines functional and performance validation extensive runtimes worst case inputs ? test case definition ? re-targeting expensive input trace mixed model function:application structure:hardware-software architecture output trace

11 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Trace-Based Simulation Steps: execution trace determined by co-simulation abstract representation using communication graph extension of graph by actual architecture Faster than simulation, but still based on single trace input trace functional model complete trace communication architecture abstract graph trace simulation estimation results [Lahiri et. al, 2001]

12 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Static Analytic Models Steps: describe computing, communication and memory resources by algebraic equations, e.g. describe properties of input using parameters, e.g. input data rate combine relations Fast and simple estimation Generally inaccurate modeling of shared resources

13 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Dynamic Analytic Models Combination between static models, possibly extended by their dynamic behavior, e.g. non-determinism in run-time and event processing dynamic models for describing shared resources (scheduling and arbitration) Variants queuing theory (statistical models, average case) real-time calculus (interval methods, worst case) More accurate than static models

14 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Dynamic Analytic Models input traces model of environment spec. of inputs component simulation system model estimation results data sheets model of components model of architecture

15 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Summary Simulation Trace-based simulation Dynamic analytic methods Static analytic methods Timing Accuracy Run-time Coverage

16 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Bounds, Guarantees and Predictability Example: end-to-end delay t best case worst case lower bound upper bound interference non-determinism design limited analysis design analysis techniques causesinfluences

17 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Basic Models and Methods Modular Performance Analysis Multi-Criteria Optimization Applications Concluding Remarks

18 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Examples Event Stream Processing Core Mobile Internet Access Embedded Internet Devices ©UCB Rabaey method (a)(fsd) for I=1 to n do nothing call comm(a,dsf,*e); end for Wearable Computing

19 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Application Model Example of a simple stream processing task structure:

20 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Architecture Templates In general, we assume an arbitrary heterogeneous architecture consisting of computing resources, memory and communication resources. event events

21 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Mapping Model

22 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Abstraction Idea: unified view of task scheduling, arbitration and event scheduling in networks: methods: queueing theory (statistical bounds, markov chains) real-time calculus (worst case bounds, min-max algebra)

23 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Real-Time Calculus Example of a dynamic analytic model Characteristics yields worst case estimation results for memory, delay, throughput takes into account application structure (task graph representation, SPI) architecture and mapping (computation, communication, scheduling) environment (characterization of input traces)

24 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Foundations of Real-Time-Calculus Linear System Theory [Baccelli, Cohen, Olsder, Quadrat 1992] Calculus for Networks [Le Boudec 1998, 2001], [Cruz 1991] Adversarial Queuing Theory [Andrews, Borodin, Kleinberg, Leighton, … 1996] Competing Approaches: SymTA/S: [R. Ernst et. al. 2002] Holistic Scheduling: [P. Eles 1999] Distributed Scheduling: [Tindell, Burns 1996] Recurring Task Models: [S. Baruah, 1998, 2002]

25 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Basic Models and Methods Modular Performance Analysis Multi-Criteria Optimization Applications Concluding Remarks

26 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Elements of Modular Performance Analysis system architecture model architectural element model environment model performance model mapping, scheduling applicationhardware architecture analysis

27 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Event Streams (Environment Model) How do we model uncertain event streams? time t [ms] Event Stream

28 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Event Streams (Environment Model) time t [ms] Event Stream Use interval bound functions: Arrival Curves

29 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory  max: 1 event min: 0 events Event Streams (Environment Model) max: 2 events min: 0 events max: 3 events min: 1 events  Use interval bound functions: Arrival Curves time t [ms]  [ms] 012 # of events uu ll maximum/minimum number of events in any interval of length 2.5 ms Event Stream Arrival Curves [  l,  u ]

30 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Elements of Modular Performance Analysis system architecture model architectural element model environment model performance model mapping, scheduling applicationhardware architecture analysis

31 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Resources (Architectural Element Model)  [ms] 012 service uu ll maximum/minimum available service in any interval of length 2.5 ms Service Curves [  l,  u ] t [ms] availability Use interval bound functions: Service Curves Service Availability Works for computation and communication resources!

32 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Arrival and Service Curves How can we determine the arrival curves of flows ? Derive arrival curves from TSpec (IETF). Use given traces (arrival function) and measure. Use properties of generating devices. How can we determine the service curves of resources (busses, computing devices) ? Use data sheet of the component (service function) and compute. Measure or simulate the service under simple load conditions (service functions) and compute.

33 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory environment model Elements of Modular Performance Analysis system architecture model architectural element model performance model mapping, scheduling applicationhardware architecture analysis

34 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Application HndlDecDisp Application p=1 s, j=0.2 s

35 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Hardware Architecture HndlDecDisp 22 MIPS10 MIPS Application HW Architecture 72 kbps p=1 s, j=0.2 s

36 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Mapping HndlDecDisp 22 MIPS10 MIPS Application HW Architecture Mapping 72 kbps p=1 s, j=0.2 s

37 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Allocation and Binding Allocation can be represented as a function: Binding is a relation: Binding restrictions: task1 task2 task3 task4 class filter schedule risc

38 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory environment model Elements of Modular Performance Analysis system architecture model architectural element model performance model mapping, scheduling applicationhardware architecture analysis

39 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Task Sequence Disp CPU2 Hndl CPU2 CPU Dec p=1 s, j=0.2 s HndlDecDisp Application p=1 s, j=0.2 s

40 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Disp CPU2 Hndl CPU2 CPU Dec Task Sequence p=1 s, j=0.2 s

41 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Performance Component ? Dec CPU t [ms] speed t [ms] events t [ms] speed t [ms] events [  l,  u ]  [ms] [  l’,  u’ ]  [ms] [  l,  u ]  [ms] [  l’,  u’ ]  [ms] ? WCET Dec BCET Dec Task Dec

42 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory A Simple Building Block task t event stream t t R(t) #events

43 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory A Simple Building Block task interaction t event stream t resource stream event stream R(t) C(t) R’(t) C’(t) Simulation can not detect absence of failures.

44 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory A Simple Building Block task t event stream interaction resource stream event stream R(t) C(t) R’(t) C’(t) interaction resource bound function event bound function embedding abstraction

45 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Bound Functions maximum/minimum number of events in any interval of length 4 number of events in time interval [0,4] events

46 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Some Basic Facts : min-plus algebra is called min-plus convolution as is called de-convolution as Many properties are known and results resemble conventional linear system theory.

47 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Some Basic Facts From streams to upper bound functions: An input stream R(t) is constraint by an upper bound function iff The output stream of a component satisfies: The output bound function of a component satisfies:

48 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Transformation of Curves

49 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Elements of Modular Performance Analysis architectural element model performance model mapping, scheduling applicationhardware architecture analysis system architecture model environment model

50 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Performance Model HndlDecDisp HW Architecture Model Application HW Architecture Application Model Mapping/Scheduling 22 MIPS10 MIPS 72 kbps p=1 s, j=0.2 s CPU1BUSCPU2  

51 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory ES 3 ES 2 ES 1 Network  ’’ ’’ ’’ FP GPS FP    GPS FP ’’ ’’   Application 1 Application 2 How can we compose resource components ? How can we add a new application? How can we estimate the load on resources? Modularity How can we represent allocation strategies? share  Resource Interface of a HW/OS/SW component?

52 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Delay and Backlog delay d backlog b ll uu [  l,  u ] [  l,  u ] [  l’,  u’ ] [  l’,  u’ ]

53 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Refined Abstractions using FSMs

54 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Event Stream Model #events vs. time intervalorder of events

55 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Functional Unit Model FSM can model caches and other architecture details program flow type-dependent behavior Improvement in estimation quality in several application studies. input_event/resource_demand/output_event

56 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Additional Analysis Methods Analyze timed FSMs with respect to their timing properties. For example: Applicable methods: minimum cycle mean [Karp], periodic graphs [Cohen, Dubois, Quadrat] minimal and maximal accumulated delay/demand/events for n consecutive transitions (and its inverse) in a compact representation minimal and maximal accumulated delay/demand/events for n consecutive transitions (and its inverse) in a compact representation

57 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Modular Performance Analysis architectural element model performance model mapping, scheduling applicationhardware architecture analysis system architecture model environment model

58 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Basic Models and Methods Modular Performance Analysis Multi-Criteria Optimization Applications Concluding Remarks

59 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Why Performance Analysis? ApplicationArchitecture Mapping Analysis (Semi-) Automated Design Space Exploration This talk: Exploration and Analysis on a high level of abstraction.

60 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Optimization with conflicting goals Multiobjective optimization: Find a set of optimal trade-offs Example: computer design resolutioncostpowersizeperformanceweight conflicts trade-offs

61 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Multi-objective Optimization

62 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Multiobjective Optimization Maximize (y 1, y 2, …, y k ) =  (x 1, x 2, …, x n ) Pareto set = set of all Pareto-optimal solutions y2y2 y1y1 worse better incomparable y2y2 y1y1 Pareto optimal = not dominated dominated

63 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Multiobjective Optimization (x 1, x 2, …, x n ) (y 1, y 2, …, y k ) Difficulties:  large search space  multiple optima Pareto optimal = not dominated dominated f Minimize x1x1 y1y1 y2y2 x2x2 decision space objective space

64 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Optimization Alternatives Use of classical single objective optimization methods simulated annealing, tabu search integer linear program other constructive or iterative heuristic methods Decision making (weighting the different objectives) is done before the optimization. Population based optimization methods evolutionary algorithms genetic algorithms Decision making is done after the optimization.

65 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Traditional Approaches y2y2 y1y1 transformation parameters y (y 1, y 2, …, y k ) multiple objectives single objective Example: weighting approach y = w 1 y 1 + … + w k y k (w 1, w 2, …, w k )

66 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Evolutionary Algorithms Principles of Evolution  Selection  Cross-over  Mutation

67 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory A Generic Multiobjective EA archivepopulation new population new archive evaluate sample vary update truncate

68 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory An Evolutionary Algorithm in Action max. y 2 min. y 1 hypothetical trade-off front

69 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory (Our) Areas of Research Algorithms: Improved techniques (distance/diversity tradeoff) Software toolboxes (building blocks) Performance Assessment: Test problems New performance indicators Statistical framework for performance assessment Theory: Convergence and diversity proofs Performance indicators SPEA-2 PISA

70 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Theoretical results  Theoretically (by analysis): difficult Limit behavior (unlimited run-time resources) Running time analysis  Empirically (by simulation): standard Problems: randomness, multiple objectives Issues: quality indicators, benchmark problems Which technique is suited for which problem class?

71 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory The Need for Quality Indicators A B A B independent of user preferences Yes (strictly) No dependent on user preferences How much? In what aspects? Is A better than B? Ideal: quality indicators allow to make both type of statements

72 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Running Time Analysis Single-objective EAs Multiobjective EAs discrete search spaces continuous search spaces problem domaintype of results expected RT (bounds) RT with high probability (bounds) [M ü hlenbein 92] [Rudolph 97] [Droste, Jansen, Wegener 98,02] [Garnier, Kallel, Schoenauer 99,00] [He, Yao 01,02] asymptotic convergence rates exact convergence rates [Beyer 95,96, … ] [Rudolph 97] [Jagerskupper 03] [no previous results]

73 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory What Is Needed… A framework that Provides ready-to-use modules (algorithms / applications) Is simple to use Is independent of programming language and OS Comes with minimum overhead Idea: separate problem-dependent from problem- independent part Selection Archiving Representation Objective functions Mutation Recombination Fitness assignment cut

74 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory A Generic Multiobjective EA archivepopulation new population new archive evaluate sample vary update truncate problem dependent

75 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory The Concept of PISA SPEA2 NSGA-II PAES Algorithms Applications knapsack TSP network processor design Platform and programming language independent Interface for Search Algorithms [Bleuler et al.: 2002]

76 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory PISA: Implementation selector process text files shared file system variator process application independent: mating / environmental selection individuals are described by IDs and objective vectors handshake protocol: state / action individual IDs objective vectors parameters application dependent: variation operators stores and manages individuals

77 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory PISA Website

78 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Basic Models and Methods Modular Performance Analysis Multi-Criteria Optimization Applications Concluding Remarks

79 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Experiences Network processor modeling (IBM) Detailed study of a network processor Good match between simulation and analytic methods (delay, memory) Use of methodology in other projects and case studies BridgeCo Siemens Netmodule Implementation and integration into design space exploration

80 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Exploration Cycle EXPO – Tool architecture MOSES EXPOSPEA 2 selection of “good” architectures system architecture performance values task graph, scenario graph, flows & resources Tool available online: Tool available online:

81 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory EXPO - Tool

82 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Results Performance for encryption/decryption Performance for RT voice processing

83 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Validation Strategy (IBM) Comparison Analytical Component Models Analytical System Model Arrival Curves Hardware Components (bus, bridge, memory, processor) Parameters Simple workloads SystemC Component Models SystemC Component Models SystemC System Model Traces Complex workloads

84 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Validation Strategy Hardware Components (bus, bridge, memory, processor) SystemC Component Models SystemC Component Models Analytical Component Models Parameters Simple workloads SystemC System Model Analytical System Model Arrival Curves Traces Comparison Complex workloads

85 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Derivation of Analytical Models Busses (PLB, OPB), Ethernet Core (EMAC), PLB-OPB-Bridge, Memory based on IBM CoreConnect and Blue Logic Core Library. Bus example: SystemC Simulation SystemC Simulation Simple workloads Data Sheets cycle Byte  cycle Byte C

86 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Validation Strategy Hardware Components (bus, bridge, memory, processor) SystemC Component Models SystemC Component Models Analytical Component Models Parameters Simple workloads SystemC System Model Analytical System Model Arrival Curves Traces Comparison Complex workloads

87 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory From Traces to Arrival Curves Trace: cycles packet Arrival Curve: cycles Byte max. packet size average rate longest gap

88 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Validation Strategy Hardware Components (bus, bridge, memory, processor) SystemC Component Models SystemC Component Models Analytical Component Models Parameters Simple workloads SystemC System Model Analytical System Model Arrival Curves Traces Comparison Complex workloads

89 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Architecture and Tasks

90 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Validation Strategy Hardware Components (bus, bridge, memory, processor) SystemC Component Models SystemC Component Models Analytical Component Models Parameters Simple workloads SystemC System Model Analytical System Model Arrival Curves Traces Comparison Complex workloads

91 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Analytical System Model

92 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Validation Strategy Hardware Components (bus, bridge, memory, processor) SystemC Component Models SystemC Component Models Analytical Component Models Parameters Simple workloads SystemC System Model Analytical System Model Arrival Curves Traces Comparison Complex workloads

93 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Comparison

94 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Application Scenario: In-Car Navigation System Car radio with navigation system User interface needs to be responsive Traffic messages (TMC) must be processed in a timely way Several applications may execute concurrently

95 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory System Overview NAVRAD MMI DB Communication

96 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory NAVRAD MMI DB Communication Application 1: Change Audio Volume < 200 ms < 50 ms

97 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Application 1: Change Audio Volume Performance RequirementsInput Data RateCommunication Resource DemandComputation Resource Demand

98 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory NAVRAD MMI DB Communication < 200 ms Application 2: Lookup Destination Address

99 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Application 2: Lookup Destination Address

100 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory NAVRAD MMI DB Communication Application 3: Receive TMC Messages < 1000 ms

101 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Application 3: Receive TMC Messages

102 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Proposed Architecture Alternatives NAVRAD MMI 22 MIPS 11 MIPS113 MIPS NAVRAD MMI 22 MIPS 11 MIPS113 MIPS RAD 260 MIPS NAV MMI 22 MIPS RAD 130 MIPS MMI NAV 113 MIPS MMI 260 MIPS RAD NAV 72 kbps 57 kbps 72 kbps (A) (E)(D)(C) (B)

103 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Step 1: Environment (Event Steams) Event Stream Model e.g. Address Lookup (1 event / sec) uu ll [s] [events] 1 1 1

104 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Step 2: Architectural Elements Event Stream Model e.g. Address Lookup (1 event / sec) Resource Model e.g. unloaded RISC CPU (113 MIPS) l=ul=u uu ll [s] [MIPS] [events]

105 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Step 3: Mapping / Scheduling Rate Monotonic Scheduling (Pre-emptive fixed priority scheduling): Priority 1:Change Volume (p=1/32 s) Priority 2:Address Lookup (p=1 s) Priority 3:Receive TMC (p=6 s)

106 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Step 4: Performance Model CPU1BUSCPU3 CPU2 Change Volume Receive TMC     NAVRAD MMI Address Lookup   MMI NAVRAD

107 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Step 5: Analysis CPU1BUSCPU3 CPU2 Change Volume Receive TMC     NAVRAD MMI Address Lookup   MMI NAVRAD Real-Time Calculus

108 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Analysis – Design Question 1 How do the proposed system architectures compare in respect to end-to-end delays?

109 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory End-to-end delays: (A)(E)(D)(C)(B) Analysis – Design Question 1

110 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Analysis – Design Question 2 How robust is architecture A? Where is the bottleneck of this architecture? NAVRAD MMI 22 MIPS 11 MIPS113 MIPS 72 kbps (A)

111 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Sensitivity to input rate: Sensitivity to resource capacity: Analysis – Design Question 2 NAVRAD MMI

112 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory TMC delay vs. MMI processor speed: Analysis – Design Question 2 NAVRAD MMI 22 MIPS 11 MIPS113 MIPS 72 kbps (A) 26.4 MIPS

113 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Analysis – Design Question 3 Architecture D is chosen for further investigation. How should the processors be dimensioned? RAD 130 MIPS MMI NAV 113 MIPS 72 kbps (D)

114 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory RAD 130 MIPS MMI NAV 113 MIPS 72 kbps 33 MIPS 29 MIPS Analysis – Design Question 3 d max = 200 d max = 1000 d max = 50 d max = 200

115 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Conclusions Easy to construct models (~ half day) Evaluation speed is fast and linear to model complexity (~ 1s per evaluation) Needs little information to construct early models (Fits early design cycle very well) Even though involved mathematics is very complex, the method is easy to use (Language of engineers)

116 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Basic Models and Methods Modular Performance Analysis Multi-Criteria Optimization Applications Concluding Remarks

117 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Refinement Strategy Exploration using analytical estimation Exploration using simulation based methods structure (architecture, algorithm) estimation (performance, memory, delay) improved models (parameters) new concepts

118 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Concluding Remarks SystemC

119 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Acknowledgement and References The presentation contains contributions by Samarjit Chakraborty (NUS) Simon Künzli, Ernesto Wandeler, Alexander Maxiaguine (ETHZ) Andreas Herkersdorf, Patricia Sagmeister (IBM) Jonas Greutert (Netmodule) Many publications are available from