Section 12: Intro to Devices

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Presentation transcript:

Section 12: Intro to Devices Extensive reading materials on reserve, including Robert F. Pierret, Semiconductor Device Fundamentals EE143 – Ali Javey

Bond Model of Electrons and Holes · Silicon crystal in a two-dimensional representation. Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si Si · When an electron breaks loose and becomes a conduction electron , a hole is also created. EE143 – Ali Javey

Semiconductors, Insulators, and Conductors Top of conduction band E = 9 eV g empty E c E = 1.1 eV g filled E E E v v c Si, Semiconductor SiO , insulator Conductor 2 Totally filled bands and totally empty bands do not allow current flow. (Just as there is no motion of liquid in a totally filled or totally empty bottle.) Metal conduction band is half-filled. Semiconductors have lower EG’s than insulators and can be doped EE143 – Ali Javey

Intrinsic Carriers - + n (electron conc) = p (hole conc) = ni electron Top of valence band Bottom of conduction band electron hole Energy gap =1.12 eV n (electron conc) = p (hole conc) = ni EE143 – Ali Javey

Dopants in Silicon Si As B · As, a Group V element, introduces conduction electrons and creates N-type silicon, and is called a donor. · B, a Group III element, introduces holes and creates P-type silicon, and is called an acceptor. EE143 – Ali Javey

Types of charges in semiconductors Hole Electron Mobile Charge Carriers they contribute to current flow with electric field is applied. Ionized Donor Acceptor Immobile Charges they DO NOT contribute to current flow with electric field is applied. However, they affect the local electric field EE143 – Ali Javey

Fermi Function–The Probability of an Energy State Being Occupied by an Electron Ef is called the Fermi energy or the Fermi level. Boltzmann approximation: E Ef + 3kT Ef + 2kT E f Ef + kT Ef Ef – kT Ef – 2kT Ef – 3kT f(E) 0.5 1 EE143 – Ali Javey

Electron and Hole Concentrations Nc is called the effective density of states. Nv is called the effective density of states of the valence band. Remember: the closer E moves up to E , the larger n is; f c the closer E moves down to E , the larger p is. f v For Si, N = 2.8 ´ 10 19 cm -3 and N = 1.04 ´ 10 19 cm -3 . c v EE143 – Ali Javey

Shifting the Fermi Level EE143 – Ali Javey

Quantitative Relationships n: electron concentration (cm-3) p : hole concentration (cm-3) ND: donor concentration (cm-3) NA: acceptor concentration (cm-3) 1) Charge neutrality condition: ND + p = NA + n 2) Law of Mass Action : n p = ni2 Assume completely ionized to form ND+ and NA- What happens when one doping species dominates? EE143 – Ali Javey

General Effects of Doping on n and p (i.e., N-type) If , and II. (i.e., P-type) If , and EE143 – Ali Javey

Carrier Drift When an electric field is applied to a semiconductor, mobile carriers will be accelerated by the electrostatic force. This force superimposes on the random thermal motion of carriers: 1 2 3 4 5 electron E E =0 E.g. Electrons drift in the direction opposite to the E-field  Current flows Average drift velocity = | v | = m E Carrier mobility EE143 – Ali Javey

Carrier Mobility Mobile carriers are always in random thermal motion. If no electric field is applied, the average current in any direction is zero. Mobility is reduced by 1) collisions with the vibrating atoms “phonon scattering” 2) deflection by ionized impurity atoms “Coulombic scattering” - Si As+ - B- - EE143 – Ali Javey

Total Mobility Na + Nd (cm-3) EE143 – Ali Javey

Conductivity and Resistivity Jp,drift = qpv = qppE Jn,drift = –qnv = qnnE Jdrift = Jn,drift + Jp,drift =  E =(qnn+qpp)E conductivity of a semiconductor is  = qnn + qpp Resistivity,  = 1/  EE143 – Ali Javey

Relationship between Resistivity and Dopant Density DOPANT DENSITY cm-3 P-type N-type RESISTIVITY (cm)  = 1/ EE143 – Ali Javey

if r is independent of depth x Sheet Resistance Rs is the resistance when W = L (in ohms/square) if r is independent of depth x Rs value for a given conductive layer (e.g. doped Si, metals) in IC or MEMS technology is used for design and layout of resistors for estimating values of parasitic resistance in a device or circuit EE143 – Ali Javey

Diffusion Current Particles diffuse from higher concentration to lower concentration locations. EE143 – Ali Javey

Diffusion Current D is called the diffusion constant. Signs explained: EE143 – Ali Javey

Generation/Recombination Processes Recombination continues until excess carriers = 0. Time constant of decay is called recombination lifetime EE143 – Ali Javey

Continuity Equations Combining all the carrier actions: Now, by the definition of current, we know: Since a change in carrier concentration must occur from a net current Therefore, we can compactly write the continuity equation as: EE143 – Ali Javey

A PN junction is present in almost every semiconductor device. PN Junctions – + I V I N P V Reverse bias Forward bias diode symbol A PN junction is present in almost every semiconductor device. EE143 – Ali Javey

Energy Band Diagram and Depletion Layer N-region P-region Ef (a) Ec Ec Ef (b) Ev Ev Ec n 0 and p 0 in the depletion layer Ef (c) Ev Neutral Depletion Neutral N-region layer P-region Ec Ef (d) Ev EE143 – Ali Javey

Qualitative Electrostatics Band diagram Built in-potential From e=-dV/dx EE143 – Ali Javey

Depletion-Layer Model On the P-side of the depletion layer,  = –qNa d E qN = - a dx e s qN qN E ( x ) = - a x + C = a ( x - x ) e 1 e p s s E On the N-side,  = qNd qN = E ( x ) d ( x + x ) e n s EE143 – Ali Javey

Effect of Bias on Electrostatics EE143 – Ali Javey

Current Flow - Qualitative EE143 – Ali Javey

PN Diode IV Characteristics EE143 – Ali Javey

MOS Capacitors MOS: Metal-Oxide-Semiconductor MOS transistor EE143 – Ali Javey

MOS Band Diagram – EE143 – Ali Javey

Flat-band Condition and Flat-band Voltage SiO 2 =0.95 eV 9 eV E , f v 3.1 eV q y s = Si + ( – ) M V fb N + -poly-Si P-body 4.8 eV =4.05eV E c E0 : Vacuum level E0 – Ef : Work function E0 – Ec : Electron affinity Si/SiO2 energy barrier V = y - y fb M s E v SiO 2 EE143 – Ali Javey

Biasing Conditions EE143 – Ali Javey

Biasing Conditions (2) EE143 – Ali Javey

Depletion and the Depletion Width The charge within the depletion region is: Poisson’s equation reduces to: Integrating twice gives: Or: EE143 – Ali Javey

Surface Depletion EE143 – Ali Javey

Threshold Condition and Threshold Voltage threshold of inversion threshold : ns = Na (Ec–Ef)surface= (Ef – Ev)bulk  A=B, and C = D EE143 – Ali Javey

Summarizing both polarities: Threshold Voltage Summarizing both polarities: + : N-type device, – : P-type device EE143 – Ali Javey

Strong Inversion–Beyond Threshold Past VT, the depletion width no longer grows All additional voltage results in inversion layer charge EE143 – Ali Javey

Review : Basic MOS Capacitor Theory EE143 – Ali Javey

Review : Basic MOS Capacitor Theory total substrate charge, Qs EE143 – Ali Javey

Quasi-Static CV Characteristics EE143 – Ali Javey

Qualitative MOSFET Operation Depletion Layer EE143 – Ali Javey

Channel Length Modulation EE143 – Ali Javey

MOSFET I-V Characteristics – A 1st attempt The Square Law Theory Current in the channel should be mainly drift-driven The current is: EE143 – Ali Javey

MOSFET I-V Characteristics – A 1st attempt But, current is constant through the channel: We know the inversion layer charge: Accounting for the non-uniformity: EE143 – Ali Javey

MOSFET I-V Characteristics – A 1st attempt Past pinch-off, the drain current is constant So: Now, in the pinched-off region: EE143 – Ali Javey

N-channel MOSFET Layout (Top View) 4 lithography steps are required: 1. active area 2. gate electrode 3. contacts 4. metal interconnects EE143 – Ali Javey

Simple NMOS Process Flow 1) Thermal oxidation (~10 nm “pad oxide”) 2) Silicon-nitride (Si3N4) deposition by CVD (~40nm) 3) Active-area definition (lithography & etch) 4) Boron ion implantation (“channel stop” implant) EE143 – Ali Javey

Simple NMOS Process Flow 5) Thermal oxidation to grow oxide in “field regions” 6) Si3N4 & pad oxide removal 7) Thermal oxidation (“gate oxide”) 8) Poly-Si deposition by CVD 9) Poly-Si gate-electrode patterning (litho. & etch) 10) P or As ion implantation to form n+ source and drain regions Top view of masks EE143 – Ali Javey

Simple NMOS Process Flow Top view of masks 11) SiO2 CVD 12) Contact definition (litho. & etch) 13) Al deposition by sputtering 14) Al patterning by litho. & etch to form interconnects EE143 – Ali Javey