Presented by: Reshef Schreiber Itay Leibovich Instructed by: Eran Segev

Serial Communication Daughter Board Board Objectives The Serial Communication Board (SCB) enables the DSP developer to interface to the commercial DSP evaluation board using common serial channels: The Serial Communication Board (SCB) enables the DSP developer to interface to the commercial DSP evaluation board using common serial channels: RS 232 RS 232 USB USB McBSP channels McBSP channels The SCB expand the I/O capabilities of the evaluation board The SCB expand the I/O capabilities of the evaluation board The SCB interfaces mechanically and electrically to the External Memory Interface (EMIF) connectors of the evaluation board The SCB interfaces mechanically and electrically to the External Memory Interface (EMIF) connectors of the evaluation board

Serial Communication Daughter Board DSP Evaluation Board

Serial Communication Daughter Board SCB Interfaces SCB Channel A Channel B RS-232 USB Channel A Channel BMcBSP External Memory Interface (EMIF) Power 12,5,3.3 V McBSP Signals Interrupts Channel A Channel B

Serial Communication Daughter Board SCB block diagram Evaluation Board Interface McBSP USB RS232 Channel A Channel B Channel A Local Bus External Memory Interface (EMIF) McBSP Signals Interrupts Channel A

Serial Communication Daughter Board EMIF The memory signals that are required for the daughtercard interface connectors are: The memory signals that are required for the daughtercard interface connectors are: Address pins Address pins address signals (up to 20) available on the memory interface of the DSP must be provided to give the maximum address space to the daughtercard. Data pins Data pins 16 or 32 data signals must be provided to facilitate access to memory or parallel peripherals. Chip Selects Chip Selects Two chip selects must be provided to access individual memory and I/O spaces. Byte Enables Byte Enables The four byte enables should be provided to access individual bytes within a 32-bit word.

Serial Communication Daughter Board RS DUART Bus Transceiver Bus Transceiver Local Bus

Serial Communication Daughter Board RS-232 Interface Uses Two Blocks: Uses Two Blocks: Dual UART (DUART) Dual UART (DUART) Universal Asynchronous Receiver-Transmitters, convert data streams from parallel to serial, enabling a serial data stream to communicate with a central processing unit. Universal Asynchronous Receiver-Transmitters, convert data streams from parallel to serial, enabling a serial data stream to communicate with a central processing unit. The Chip is TBD The Chip is TBD Bus Transceivers - Transform the logic level waveforms to RS-232 Levels Bus Transceivers - Transform the logic level waveforms to RS-232 Levels Example MAX232 (MAXIM) Example MAX232 (MAXIM)

Serial Communication Daughter Board USB Interface Local Bus

Serial Communication Daughter Board USB Interface The USB is a cable bus that supports data exchange between a host computer and a wide range of simultaneously accessible peripherals. The USB is a cable bus that supports data exchange between a host computer and a wide range of simultaneously accessible peripherals. The attached peripherals share USB bandwidth through a host-scheduled, token-based protocol. The attached peripherals share USB bandwidth through a host-scheduled, token-based protocol. The bus allows peripherals to be attached, configured, used, and detached while the host and other peripherals are in operation. The bus allows peripherals to be attached, configured, used, and detached while the host and other peripherals are in operation.

Serial Communication Daughter Board McBSP Interface McBSP (Multi Channel Buffer Serial Port) provide full duplex, bidirectional communication with external serial devices. McBSP (Multi Channel Buffer Serial Port) provide full duplex, bidirectional communication with external serial devices. Full-duplex communication Full-duplex communication Double-buffered transmission and triple-buffered reception, which allow a continuous data stream Double-buffered transmission and triple-buffered reception, which allow a continuous data stream 128 channels for transmission and for reception 128 channels for transmission and for reception

Serial Communication Daughter Board Timetable 7/11 - DR 7/11 - DR Week 1-2: PDR (Preliminary Design Review) Week 1-2: PDR (Preliminary Design Review) Block diagram Block diagram Component list Component list Orcad tutorial Orcad tutorial Week 3-7: Schematics Design Week 3-7: Schematics Design BDR BDR