Defining protected-mode segment-descriptors An example of a protected-mode bootsector application that draws a message to the video display.

Slides:



Advertisements
Similar presentations
DOS and BIOS Interrupts DOS and BIOS interrupts are used to perform some very useful functions, such as displaying data to the monitor, reading data from.
Advertisements

VGA Text Mode An introduction to font selection and to reprogramming of the Character Generator ram.
Crafting a ‘boot time’ program How we can utilize some standard ‘real-mode’ routines that reside in the PC’s ROM-BIOS firmware.
Intel MP.
OS Memory Addressing.
Using data conversions
More about procedures and Video Processing. Lesson plan Review existing concepts More about procedures and boolean expression Video processing.
Video systems (continue). Practice Modify the program to get a string from a keyboard to display the input string on the middle of the screen with reverse.
CS318 Project #2 Bootup Mechanism.
Direct video practice and Keyboard Operations
Interrupts in Protected-Mode Writing a protected-mode interrupt-service routine for the timer-tick interrupt.
Interrupts in Protected-Mode Writing a protected-mode interrupt-service routine for the timer-tick interrupt.
IA32 Paging Scheme Introduction to the Intel x86’s support for “virtual” memory.
Viewing 8086 memory-areas A peek into the video display memory, the real-mode Interrupt Vector Table, and the ROM-BIOS DATA AREA.
Processor Exceptions A survey of the x86 exceptions and mechanism for handling faults, traps, and aborts.
Linux Memory Issues An introduction to some low-level and some high-level memory management concepts.
Getting Ready to Enter x86 Protected Mode Survival tactics for enabling Protected-Mode with a minimum of supporting infrastructure.
Page-Faults in Linux How can we study the handling of page-fault exceptions?
Interrupts in Protected-Mode Writing a protected-mode interrupt-service routine for the timer-tick interrupt.
The various x86 ‘modes’ On understanding key differences among the processor’s several execution-architectures.
Processor Privilege-Levels How the x86 processor accomplishes transitions among its four distinct privilege-levels.
Deferred segment-loading An exercise on implementing the concept of ‘load-on-demand’ for the program-segments in an ELF executable file.
Venturing into protected-mode A first look at the CPU registers and instructions which provide the essential supporting infrastructure.
1 Hardware and Software Architecture Chapter 2 n The Intel Processor Architecture n History of PC Memory Usage (Real Mode)
X86 segmentation, page tables, and interrupts 3/17/08 Frans Kaashoek MIT
基于 i386 体系结构的 Linux 启动代码分析 Embedded Operating Systems2 启动代码文件 linux/arch/i386/boot/bootsect.S linux/arch/i386/boot/setup.S linux/arch/i386/boot/compressed/head.S.
Executing an ELF executable
Linux Memory Issues Introduction. Some Architecture History 8080 (late-1970s) 16-bit address (64-KB) 8086 (early-1980s) 20-bit address (1-MB) (mid-’80s)
Graphics Bitmaps Drawing characters glyphs and multicolor patterns.
Setup for VM launch Using ‘vmxwrite’ and ‘vmxread’ for access to state-information in a Virtual Machine Control Structure.
Understanding POST and ROM-BIOS service functions Numerous low-level services are available to real-mode programs (include boot-loaders)
Venturing into 64-bit mode Examining the steps needed to take the processor into IA-32e mode -- and then back out again.
Segment-registers’ hidden bits A look at how segmentation attributes are cached within the CPU’s segment-registers.
Deferred segment-loading An exercise on implementing the concept of ‘load-on-demand’
Venturing into protected-mode
Special segment-registers
A ‘protected-mode’ exploration A look at the steps needed to build segment-descriptors for displaying a message while in protected-mode.
Microprocessor Systems Design I Instructor: Dr. Michael Geiger Spring 2012 Lecture 2: 80386DX Internal Architecture & Data Organization.
8086 emulation Using Virtual-8086 mode to execute real-mode procedures in a protected-mode environment.
Venturing into protected-mode A first look at the CPU registers and instructions which provide the essential supporting infrastructure.
Interrupts in Protected-Mode Writing a protected-mode interrupt-service routine for the timer-tick interrupt.
ORG ; FOUR INT 21H and INT 10H Programming and Macros Dec Hex Bin
1 / 40 Implementation of Paging in uCOS-II Ke, Dian Chia.
Microprocessor system architectures – IA32 segmentation Jakub Yaghob.
ECE291 Computer Engineering II Lecture 9 Josh Potts University of Illinois at Urbana- Champaign.
Text-mode Video Dr. Dimitrios S. Nikolopoulos CSL/UIUC
Chapter 3 Examining Computer Memory and Executing Instructions.
Types of Registers (8086 Microprocessor Based)
Chapter 2 Instruction Addressing and Execution. Lesson plan Review some concepts in the first week First assembly program with EMU8086 Related concepts.
Text-Mode Programming Question #1 What are the three levels of access to the video display when writing characters on the screen in text mode?
UHD:CS2401: A. Berrached1 The Intel x86 Hardware Organization.
Video systems. Lesson plan Review the code for the previous exercise Video systems Review for midterm exam.
3 Types of Video Output for Text DOS-level INT (Int 21) Output can be easily redirected to other devices (printer, disk) Slow Speed Cannot control the.
10H Interrupt. Option 0H – Sets video mode. Registers used: – AH = 0H – AL = Video Mode. 3H - CGA Color text of 80X25 7H - Monochrome text of 80X25 Ex:
String Instructions String instructions were designed to operate on large data structures. The SI and DI registers are used as pointers to the data structures.
Segment Descriptor Segments are areas of memory defined by a programmer and can be a code, data or stack segment. In segments need not be all the.
4. Kernel and VGA ENGI 3655 Lab Sessions. Richard Khoury2 Textbook Readings  None.
Microprocessors Monday, Apr. 16 Dr. Asmaa Farouk Faculty of Engineering, Electrical Department, Assiut University.
Information Security - 2. Descriptor Tables There are two descriptor tables – Global Descriptor Tables – Local Descriptor Tables The global descriptor.
OS Memory Addressing. Architecture CPU – Processing units – Caches – Interrupt controllers – MMU Memory Interconnect North bridge South bridge PCI, etc.
Lecture 11 Text mode video
Lecture 6 Presented By Dr. Shazzad Hosain Asst. Prof. EECS, NSU.
Chapter 2 Instruction Addressing and Execution. Lesson plan Review some concepts in the first week First assembly program with EMU8086 Related concepts.
Computer Graphics Lecture 04 Point Taqdees A. Siddiqi
Presentation on Real Mode Memory Addressing
143A: Principles of Operating Systems Lecture 5: Address translation
x86 segmentation, page tables, and interrupts
Microprocessor and Assembly Language
CS-401 Computer Architecture & Assembly Language Programming
CS444/544 Operating Systems II Virtual Memory
Presentation transcript:

Defining protected-mode segment-descriptors An example of a protected-mode bootsector application that draws a message to the video display

What will we do once there? Let’s explore writing a bootsector program that will do something perceptible while in protected-mode, namely: show a message We won’t be able to call BIOS functions (they’re designed to work in real-mode) We must write directly to video memory

Recall PC Memory Layout RAM 1-MB ROM-BIOS VIDEO-BIOS VRAM 0xA0000 0xC0000 0xF0000 0x00000

Three VRAM zones GRAPHICS MONOCHROME TEXT COLOR TEXT 64-KB 32-KB 0xA0000 0xB0000 0xB8000

Array of picture-elements Text-mode VRAM is organized as an array Each array-element occupies one word Word’s LSB holds ascii character-code Word’s MSB holds a color-number pair bgcolorfgcolorASCII character-code byte nybble

Color-Attribute Byte Blink RGB Intense GB R foreground color attribute background color attribute

Screen-element locations 80 columns 25 rows characters characters Video screen characters

x86 “Little-Endian” storage Intel’s x86 CPUs use little-endian storage The “little end” of any multibyte value is stored at the smaller operand-address Example:EAX = 0x mov [0x9000], EAX Memory-addresses occupied by operand 0x120x340x560x78 0x9000 0x9001 0x9002 0x9003

Drawing a character-string Setup DS:SI with string’s starting address Setup ES:DI with initial address on screen Clear DF-bit (Direction Flag) in FLAGS register Setup desired color attribute-byte in AH register again: lodsb ; next character to AL oral, al; is final null-byte? jzfinis; yes, exit from loop stosw; write char & colors jmp again; go back for another finis:

Planning our memory usage To draw a screen-message in protected- mode, our program will need to address these memory-segments: –its code (executable, at 0x07C00) –its data (readable and writable, at 0x07C00) –its stack (readable, writable, expand-down) –the video ram (32KB, writable, at 0xB8000) For its return to real-mode, our program will need 64KB code and data segments

VRAM segment-descriptor Base[31..24]GD RSVRSV AVLAVL Limit [19..16] P DPLDPL SX C/DC/D R/WR/W ABase[23..16] Base[15..0]Limit[15..0] VRAM Base-Address = 0x000B8000 VRAM Segment-Limit = 0x07FFF (32-KB) Segment-attributes: P=1, A=0, S=1, X=0, D=0, W=1 DPL=0, G=0, D=0 (RSV=0, AVL=0).WORD0x7FFF, 0x8000, 0x920B, 0x0000

CODE segment-descriptor Base[31..24]GD RSVRSV AVLAVL Limit [19..16] P DPLDPL SX C/DC/D R/WR/W ABase[23..16] Base[15..0]Limit[15..0] CODE Base-Address = 0x00007C00 CODE Segment-Limit = 0x0FFFF (64-KB) Segment-attributes: P=1, A=0, S=1, X=1, C=0, R=1 DPL=0, G=0, D=0 (RSV=0, AVL=0).WORD0xFFFF, 0x7C00, 0x9A00, 0x0000

DATA segment-descriptor Base[31..24]GD RSVRSV AVLAVL Limit [19..16] P DPLDPL SX C/DC/D R/WR/W ABase[23..16] Base[15..0]Limit[15..0] DATA Base-Address = 0x00007C00 DATA Segment-Limit = 0x0FFFF (64-KB) Segment-attributes: P=1, A=0, S=1, X=0, D=0, W=1 DPL=0, G=0, D=0 (RSV=0, AVL=0).WORD0xFFFF, 0x7C00, 0x9200, 0x0000

STACK segment-descriptor Base[31..24]GD RSVRSV AVLAVL Limit [19..16] P DPLDPL SX C/DC/D R/WR/W ABase[23..16] Base[15..0]Limit[15..0] STACK Base-Address = 0x00007C00 STACK Segment-Limit = 0x001FF (512-Bytes) Segment-attributes: P=1, A=0, S=1, X=0, D=1, W=1 DPL=0, G=0, D=0 (RSV=0, AVL=0).WORD0x01FF, 0x7C00, 0x9600, 0x0000

Setting up the GDT Base-Address must be quadword-aligned.ALIGN8 NULL-Descriptor occupies first quadward theGDT:.WORD0, 0, 0, 0 GDT base-address and segment-limit: base:#0x00007C00 + #theGDT limit:8 * (number of descriptors) - 1

Loading register LDTR We can load LDTR from our stack: moveax, #0x00007C00; boot location add eax, #theGDT; add GDT offset movdx, #0x27; five descriptors pusheax; push bits pushdx; push bits lgdt[esp]; load 48-bit LDTR addesp, #6; discard 3 words BASE_ADDRESSLIMIT GDTR 48-bits

Entering protected-mode No interrupts from any peripheral devices (since BIOS’s real-mode ISRs won’t work) Set the PE-bit to 1 (in register CR0) Do a far-jump (to load the CS attributes) Load SS:SP with stacktop and attributes Setup DS and ES for data and vram Write character-string to video memory

Leaving protected-mode Be sure segment-registers are loaded with selectors for descriptors that have suitable segment-limits and segment-attributes for correct execution when back in real-mode Reset PE-bit to 0 (in register CR0) Do a far-jump (to load CS with paragraph) Load SS:SP with real-mode stack-address Wait for user’s keypress before rebooting

Demo-program We have a bootsector program on website (‘pmhello.s’) which illustrates the principles just discussed Try assembling and installing it: –$ as86 pmhello.s –b pmhello.b –$ dd if=pmhello.b of=/dev/fd0 Restart machine, use the GRUB memu to select this bootsector as execution-option

In-class exercises What happens if you changed the ‘code’ descriptor’s access-rights byte from 0x9A to 0x9C (i.e., conforming code-segment)? Where exactly in does the ‘expand-down’ stack-segment reside? –BASE_ADDRESS = 0x00007C00 –SEGMENT_LIMIT = 0x001FF