ASCII Code Table (7 bit) UNICODE (16 bit) - UTF-8 provides a 16 bit superset of ASCII.

Slides:



Advertisements
Similar presentations
Fixed Point Numbers The binary integer arithmetic you are used to is known by the more general term of Fixed Point arithmetic. Fixed Point means that we.
Advertisements

1 CONSTRUCTING AN ARITHMETIC LOGIC UNIT CHAPTER 4: PART II.
Princess Sumaya Univ. Computer Engineering Dept. Chapter 3:
Princess Sumaya Univ. Computer Engineering Dept. Chapter 3: IT Students.
COMP3221: Microprocessors and Embedded Systems Lecture 14: Floating Point Numbers Lecturer: Hui Wu Session 2, 2004.
Logic Circuits Another look at Floating Point Numbers Common Combinational Logic Circuits Timing Sequential Circuits Note: Multiplication & Division in.
Major Numeric Data Types Unsigned Integers Signed Integer Alphanumeric Data – ASCII & UNICODE Floating Point Numbers.
Number Systems Standard positional representation of numbers:
Chapter 6 Arithmetic. Addition Carry in Carry out
Chapter 3 Continued Logic Gates Logic Chips Combinational Logic Timing Sequential Logic Flip Flops Registers Memory State Machines.
Integer Arithmetic Floating Point Representation Floating Point Arithmetic Topics.
Major Numeric Data Types Unsigned Integers Signed Integers Alphanumeric Data – ASCII & UNICODE Floating Point Numbers.
Faculty of Computer Science © 2006 CMPUT 229 Digital Logic From Switches to Memories.
1 Module 2: Floating-Point Representation. 2 Floating Point Numbers ■ Significant x base exponent ■ Example:
3-1 Chapter 3 - Arithmetic Computer Architecture and Organization by M. Murdocca and V. Heuring © 2007 M. Murdocca and V. Heuring Computer Architecture.
Introduction to Computing Systems from bits & gates to C & beyond Chapter 2 Bits, Data Types & Operations Integer Representation Floating-point Representation.
Simple Data Type Representation and conversion of numbers
Computer Architecture Lecture 3: Logical circuits, computer arithmetics Piotr Bilski.
Number Systems II Prepared by Dr P Marais (Modified by D Burford)
Chapter 3 Digital Logic Structures. 3-2 Transistor: Building Block of Computers Microprocessors contain millions of transistors Intel Pentium 4 (2000):
1 CHAPTER 4: PART I ARITHMETIC FOR COMPUTERS. 2 The MIPS ALU We’ll be working with the MIPS instruction set architecture –similar to other architectures.
Computing Systems Basic arithmetic for computers.
COMPSCI 210 Semester Tutorial 1
Data Representation in Computer Systems
Computer Science Engineering B.E.(4 th sem) c omputer system organization Topic-Floating and decimal arithmetic S ubmitted to– Prof. Shweta Agrawal Submitted.
Digital Logic Structures. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 3-2 Roadmap Problems Algorithms.
07/19/2005 Arithmetic / Logic Unit – ALU Design Presentation F CSE : Introduction to Computer Architecture Slides by Gojko Babić.
9.4 FLOATING-POINT REPRESENTATION
Number Systems ELEC 311 Digital Logic and Circuits Dr. Ron Hayne Images Courtesy of Cengage Learning.
Figure 1.1 Block diagram of a digital computer. Functional Units.
Quiz What are the results of the following 4-bit bitwise logical operations? NOT OR NOR AND
Digital Logic Structures MOS transistors logic gates functional units of a computer.
Dale Roberts Department of Computer and Information Science, School of Science, IUPUI CSCI N305 Information Representation: Floating Point Representation.
Princess Sumaya Univ. Computer Engineering Dept. Chapter 3:
1 Floating Point Operations - Part II. Multiplication Do unsigned multiplication on the mantissas including the hidden bits Do unsigned multiplication.
Integer and Fixed Point P & H: Chapter 3
Computer Arithmetic Floating Point. We need a way to represent –numbers with fractions, e.g., –very small numbers, e.g., –very large.
Computer Architecture Lecture 22 Fasih ur Rehman.
IT253: Computer Organization
Binary Arithmetic.
1. Computing Systems Lecture 3 Binary Representation & Boolean Logic Binary and Logic 2.
Number Representation and Arithmetic Circuits
Computer Architecture Lecture 11 Arithmetic Ralph Grishman Oct NYU.
Lecture 2 Number Representation, Overflow and Logic Topics Adders Math Behind Excess-3 Overflow Unsigned, signed-magnitude Two’s Complement Gray Code Boolean.
Chapter 3 Digital Logic Structures
1 Ethics of Computing MONT 113G, Spring 2012 Session 4 Binary Addition.
Computing Systems Lecture 3 Binary Representation & Boolean Logic Binary and Logic 1.
COSC2410: LAB 2 BINARY ARITHMETIC SIGNED NUMBERS FLOATING POINT REPRESENTATION BOOLEAN ALGEBRA 1.
1 CE 454 Computer Architecture Lecture 4 Ahmed Ezzat The Digital Logic, Ch-3.1.
Floating Point Arithmetic – Part I
Floating Point Representations
Integer Division.
NxN Crossbar design for Barrel Shifter
Expressible Numbers.
IEEE floating point format
Chapter 6 Floating Point
Lecture 10: Floating Point, Digital Design
Chapter 2 Bits, Data Types & Operations Integer Representation
Data Representation and Arithmetic Algorithms
Number Representations
CSCI206 - Computer Organization & Programming
Data Representation and Arithmetic Algorithms
LOGIC Circuits.
Overview Fractions & Sign Extension Floating Point Representations
Number Representations
Lecture 9: Shift, Mult, Div Fixed & Floating Point
Presentation transcript:

ASCII Code Table (7 bit) UNICODE (16 bit) - UTF-8 provides a 16 bit superset of ASCII

2’s Complement Sign Extention Positive numbers Negative numbers

2’s Complement Arithmetic Addition Subtraction Multiplication, Division ?

Round off Errors Errors due to inherent imprecision of computers / computation

Overflow Adding two numbers which results In a sum that is too large to store: A + B A - B

Underflow A calculation in floating point that results in an intermediate result that is essentially zero.

Floating Point Numbers Example: x Sign Fraction Exponent

Single Precision Floating Point Numbers IEEE Standard Single Precision Floating Point Numbers are 32 bits long: S EEEEEEEE FFFFFFFFFFFFFFFFFFFFFFF Sign – 1 bit Exponent – 8 bits Fraction – 23 bits The value V: If E=255 and F is nonzero, then V= NaN ("Not a number") If E=255 and F is zero and S is 1, then V= - Infinity If E=255 and F is zero and S is 0, then V= Infinity If 0<E<255 then V= (-1)**S * 2 ** (E-127) * (1.F) If E=0 and F is nonzero, then V= (-1)**S * 2 ** (-126) * (0.F) ("unnormalized" values”) If E=0 and F is zero and S is 1, then V= - 0 If E=0 and F is zero and S is 0, then V = 0

Double Precision Floating Point Numbers IEEE Standard Double Precision Floating Point Numbers are 64 bits long: S EEEEEEEEEEE FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF Sign – 1 bit Exponent – 11 bits Fraction – 52 bits The value V: If E=2047 and F is nonzero, then V= NaN ("Not a number") If E=2047 and F is zero and S is 1, then V= - Infinity If E=2047 and F is zero and S is 0, then V= Infinity If 0<E<2047 then V= (-1)**S * 2 ** (E-1023) * (1.F) If E=0 and F is nonzero, then V= (-1)**S * 2 ** (-1022) * (0.F) ("unnormalized" values) If E=0 and F is zero and S is 1, then V= - 0 If E=0 and F is zero and S is 0, then V= 0

Chapter 3 Digital Logic Structures The Transistor CMOS Devices Implementing Logic with CMOS Devices Combinational Logic Circuits Decoders Mux’s Full Adder PLA’s

Introduction to MOS N-type MOS

N-Type MOS Devices

P-Type MOS Devices

CMOS Device - Inverter p channel device n channel device CMOS Inverter 3-5 volts

CMOS NOR Gate NOR Gate

CMOS OR Gate OR Gate

CMOS AND Gate AND Gate

2 BIT Decoder