ECE 301 – Digital Electronics Circuit Design and Analysis (Lecture #9A) The slides included herein were taken from the materials accompanying Fundamentals.

Slides:



Advertisements
Similar presentations
Combinational Circuits CS370 – Spring BCD to 7 Segment Display Controller Understanding the problem: input is a 4 bit bcd digit output is the control.
Advertisements

ECE 331 – Digital System Design Latches and Flip-Flops (Lecture #17) The slides included herein were taken from the materials accompanying Fundamentals.
ECE 331 – Digital System Design
ECE 331 – Digital System Design
ECE 301 – Digital Electronics Karnaugh Maps (Lecture #7) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,
ECE 331 – Digital System Design
ECE 331 – Digital System Design Boolean Algebra (Lecture #3) The slides included herein were taken from the materials accompanying Fundamentals of Logic.
ECE 331 – Digital System Design Introduction to and Analysis of Sequential Logic Circuits (Lecture #20) The slides included herein were taken from the.
ECE 301 – Digital Electronics Minterm and Maxterm Expansions and Incompletely Specified Functions (Lecture #6) The slides included herein were taken from.
ECE 331 – Digital System Design
ECE 331 – Digital System Design
ECE 331 – Digital System Design
MULTI-LEVEL GATE NETWORKS
ENGIN112 L13: Combinational Design Procedure October 1, 2003 ENGIN 112 Intro to Electrical and Computer Engineering Lecture 13 Combinational Design Procedure.
CS 151 Digital Systems Design Lecture 13 Combinational Design Procedure.
ECE 331 – Digital System Design Logic Circuit Design (Lecture #7)
ECE 301 – Digital Electronics Boolean Algebra and Standard Forms of Boolean Expressions (Lecture #4) The slides included herein were taken from the materials.
ECE 331 – Digital System Design Multi-level Logic Circuits and NAND-NAND and NOR-NOR Circuits (Lecture #8) The slides included herein were taken from the.
ECE 331 – Digital System Design
ECE 301 – Digital Electronics Number Systems and Conversion, Binary Arithmetic, and Representation of Negative Numbers (Lecture #10) The slides included.
ECE 331 – Digital System Design Counters (Lecture #19) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design,
ECE 301 – Digital Electronics
Canonical Forms and Logic Miniminization
ECE 331 – Digital System Design Karnaugh Maps and Determining a Minimal Cover (Lecture #7) The slides included herein were taken from the materials accompanying.
ECE 331 – Digital System Design
ECE 301 – Digital Electronics Karnaugh Maps and Determining a Minimal Cover (Lecture #8) The slides included herein were taken from the materials accompanying.
ECE 331 – Digital System Design Sequential Circuit Design (Lecture #23) The slides included herein were taken from the materials accompanying Fundamentals.
ECE 301 – Digital Electronics Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #17)
ECE 331 – Digital Systems Design Introduction to Sequential Logic Circuits (aka. Finite State Machines) and FSM Analysis (Lecture #19)
Combinational Logic Design
ECE 331 – Digital System Design Power Dissipation and Additional Design Constraints (Lecture #14) The slides included herein were taken from the materials.
ITEC 352 Lecture 5 Low level components(3). Low level components Review Multiplexers Demultiplexer Minterm/Maxterm Karnaugh Map.
Logic Function Optimization. Combinational Logic Circuit Regular SOP and POS designs Do not care expressions Digital logic circuit applications Karnaugh.
طراحی مدارهای منطقی نیمسال دوم دانشگاه آزاد اسلامی واحد پرند.
ECE 331 – Digital System Design
Based on slides by: Charles Kime & Thomas Kaminski © 2004 Pearson Education, Inc. ECE/CS 352: Digital System Fundamentals Lecture 9 – Multilevel Optimization.
ECE 331 – Digital System Design NAND and NOR Circuits, Multi-level Logic Circuits, and Multiple-output Logic Circuits (Lecture #9) The slides included.
ECE 331 – Digital System Design Constraints in Logic Circuit Design (Lecture #13) The slides included herein were taken from the materials accompanying.
ECE 331 – Digital System Design
Charles Kime & Thomas Kaminski © 2008 Pearson Education, Inc. Circuit Optimization Logic and Computer Design Fundamentals.
Unit 7 Multi-Level Gate Circuits Nand and Nor Gates Fundamentals of Logic Design Roth and Kinny.
ECE 2110: Introduction to Digital Systems PoS minimization Don’t care conditions.
ECE 331 – Digital System Design Circuit Design and Analysis (Lecture #9A) The slides included herein were taken from the materials accompanying Fundamentals.
ACOE1611 Combinational Logic Circuits Reference: M. Mano, C. Kime, “Logic and Computer Design Fundamentals”, Chapter 2.
NAND-NAND and NOR-NOR Circuits and Even and Odd Logic Functions
ETE 204 – Digital Electronics
Figure 4–1 Application of commutative law of addition. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by Pearson Education, Inc. Upper Saddle.
Digital Electronics Digital Electronics G.S.UTHAYAKUMAR ST.JOSEPH’S COLLEGE OF ENGINEERING,CHENNAI-119.
ECE 331 – Digital System Design Single-bit Adder Circuits and Adder Circuits in VHDL (Lecture #11) The slides included herein were taken from the materials.
ECE 301 – Digital Electronics Representation of Negative Numbers, Binary Arithmetic of Negative Numbers, and Binary Codes (Lecture #11) The slides included.
NAND-NAND and NOR-NOR Circuits and Even and Odd Logic Functions ECE 301 – Digital Electronics.
1 Lecture 12 More about Combinational Analysis and Design Procedures.
ECE 320 Homework #3 1. Simplify the Boolean function F using the don’t care conditions d, in both S.O.P. and P.O.S. form: a) F=A’B’D’+A’CD+A’BC d=A’BC’D+ACD+AB’D’
1 CS 151: Digital Design Chapter 3: Combinational Logic Design 3-1Design Procedure CS 151: Digital Design.
CEC 220 Digital Circuit Design NAND/NOR Multi-Level Circuits
ECE 301 – Digital Electronics Logic Circuit Design (Lecture #9)
ECE 331 – Digital System Design Basic Logic Operations, Boolean Expressions and Truth Tables, and Standard Logic Gates The slides included herein were.
ECE 301 – Digital Electronics Minimizing Boolean Expressions using K-maps, The Minimal Cover, and Incompletely Specified Boolean Functions (Lecture #6)
Figure 5–5 Exclusive-OR logic diagram and symbols. Open file F05-05 to verify the operation. Thomas L. Floyd Digital Fundamentals, 9e Copyright ©2006 by.
School of Computer and Communication Engineering, UniMAP DKT 122/3 - DIGITAL SYSTEM I Chapter 4A:Boolean Algebra and Logic Simplification) Mohd ridzuan.
CEC 220 Digital Circuit Design Minterms and Maxterms Monday, January 26 CEC 220 Digital Circuit Design Slide 1 of 11.
Discrete Systems I Lecture 09 Minterms and Decoders Profs. Koike and Yukita.
Lecture 1 Gunjeet kaur Dronacharya group of institutions.
ECE 331 – Digital System Design
ECE 301 – Digital Electronics
ECE 331 – Digital System Design
ECE 331 – Digital System Design
ECE 331 – Digital System Design
ECE 301 – Digital Electronics
ECE 331 – Digital System Design
Presentation transcript:

ECE 301 – Digital Electronics Circuit Design and Analysis (Lecture #9A) The slides included herein were taken from the materials accompanying Fundamentals of Logic Design, 6 th Edition, by Roth and Kinney, and were used with permission from Cengage Learning.

Spring 2011ECE Digital Electronics2 Logic Circuits Combinational Logic Circuits  Output is a function of the inputs.  Output is not a function of the order of the inputs.  No memory is required. Sequential Logic Circuits  Output is a function of the state of the circuit and the inputs.  Output is a function of the history of the inputs.  Requires memory.

Spring 2011ECE Digital Electronics3 Circuit Design

Spring 2011ECE Digital Electronics4 Circuit Design For a given logic function, two two-level logic circuits can be realized.  An AND-OR (NAND-NAND) circuit  An OR-AND (NOR-NOR) circuit However, these two logic circuits do not necessarily have the same cost. An objective of the digital circuit designer is to minimize the cost of the circuit to be built.

Spring 2011ECE Digital Electronics5 Circuit Design Issues More than one circuit may meet the design requirements.  Solutions are, generally, not unique Cannot always satisfy all of the requirements. Design tradeoffs must be identified and considered.  Cost  Speed  Power consumption

Spring 2011ECE Digital Electronics6 Design Procedure Identify the requirements (i.e. circuit specifications) Determine the inputs and outputs Derive the truth table Determine the minterm and maxterm expansions Use K-maps (and Boolean algebra), to derive the minimum SOP and POS expressions Compare the costs of the two expressions Build (or synthesize) the “cheaper” circuit Verify the functional behavior of the circuit

Spring 2011ECE Digital Electronics7 Circuit Design: Example #1 Design a combinational logic circuit that meets the following requirements: 1. Outputs a logic 1 for all values in the Fibonacci series between 0 and Outputs a logic 0 otherwise.

Spring 2011ECE Digital Electronics8 Circuit Design: Example #1 Questions: 1. What is the Fibonacci Series? 2. How many bits are needed to represent the input? 3. How many bits are needed to represent the output?

Spring 2011ECE Digital Electronics9 Circuit Design: Example #1 Design in progress …

Spring 2011ECE Digital Electronics10 Circuit Design: Example #2 Design a 7-Segment Decoder.

Spring 2011ECE Digital Electronics11 Circuit Design: Example #2 7-Segment Decoder BCD Number 7-Segment Display 4 inputs 7 outputs

Spring 2011ECE Digital Electronics12 Binary Coded Decimal A 4-bit code is used to represent each decimal digit. Decimal DigitBinary Code

Spring 2011ECE Digital Electronics13 7-Segment Display

Spring 2011ECE Digital Electronics14 7-Segment Display

Spring 2011ECE Digital Electronics15 Circuit Design: Example #2 Design in progress …

Spring 2011ECE Digital Electronics16 Circuit Analysis

Spring 2011ECE Digital Electronics17 Circuit Analysis Analyze a logic circuit to determine its behavior. For a two-level circuit, the analysis process is simple.  Boolean expression can often be written by inspection. For multi-level circuits, the process is more complex.  Cannot write a Boolean expression by inspection.  Must follow a procedure to implement the analysis.

Spring 2011ECE Digital Electronics18 Analysis Procedure Identify the circuit inputs and output(s). Track the logical behavior from input to output. Determine the Boolean expression for the output(s). Derive the truth table for the output(s). Evaluate the electrical and timing characteristics of the circuit.

Spring 2011ECE Digital Electronics19 Circuit Analysis: Example Analyze the following logic circuit: 1. Determine the Boolean expression 2. Derive the truth table A B' D' E C F

Spring 2011ECE Digital Electronics20 Questions?