Chapter 1 CSF 2009 Computer Performance. Defining Performance Which airplane has the best performance? Chapter 1 — Computer Abstractions and Technology.

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Presentation transcript:

Chapter 1 CSF 2009 Computer Performance

Defining Performance Which airplane has the best performance? Chapter 1 — Computer Abstractions and Technology — 2

Response Time and Throughput Response time How long it takes to do a task Throughput Total work done per unit time e.g., tasks/transactions/… per hour How are response time and throughput affected by Replacing the processor with a faster version? Adding more processors? We’ll focus on response time for now… Chapter 1 — Computer Abstractions and Technology — 3

Relative Performance Define Performance = 1/Execution Time “X is n time faster than Y” Chapter 1 — Computer Abstractions and Technology — 4 Example: time taken to run a program 10s on A, 15s on B Execution Time B / Execution Time A = 15s / 10s = 1.5 So A is 1.5 times faster than B

Measuring Execution Time Elapsed time – Total response time, including all aspects Processing, I/O, OS overhead, idle time – Determines system performance CPU time – Time spent processing a given job Discounts I/O time, other jobs’ shares – Comprises user CPU time and system CPU time – Different programs are affected differently by CPU and system performance Chapter 1 — Computer Abstractions and Technology — 5

CPU Clocking Operation of digital hardware governed by a constant-rate clock Chapter 1 — Computer Abstractions and Technology — 6 Clock (cycles) Data transfer and computation Update state Clock period Clock period: duration of a clock cycle e.g., 250ps = 0.25ns = 250×10 –12 s Clock frequency (rate): cycles per second e.g., 4.0GHz = 4000MHz = 4.0×10 9 Hz

CPU Time Performance improved by – Reducing number of clock cycles – Increasing clock rate – Hardware designer must often trade off clock rate against cycle count Chapter 1 — Computer Abstractions and Technology — 7

CPU Time Example Computer A: 2GHz clock, 10s CPU time Designing Computer B – Aim for 6s CPU time – Can do faster clock, but causes 1.2 × clock cycles How fast must Computer B clock be? Chapter 1 — Computer Abstractions and Technology — 8

Instruction Count and CPI Instruction Count for a program Determined by program, ISA and compiler Average cycles per instruction Determined by CPU hardware If different instructions have different CPI Average CPI affected by instruction mix Chapter 1 — Computer Abstractions and Technology — 9

CPI Example Computer A: Cycle Time = 250ps, CPI = 2.0 Computer B: Cycle Time = 500ps, CPI = 1.2 Same ISA Which is faster, and by how much? Chapter 1 — Computer Abstractions and Technology — 10 A is faster… …by this much

CPI in More Detail If different instruction classes take different numbers of cycles Chapter 1 — Computer Abstractions and Technology — 11 Weighted average CPI Relative frequency

CPI Example Alternative compiled code sequences using instructions in classes A, B, C Chapter 1 — Computer Abstractions and Technology — 12 ClassABC CPI for class123 IC in sequence 1212 IC in sequence 2411 Sequence 1: IC = 5 Clock Cycles = 2×1 + 1×2 + 2×3 = 10 Avg. CPI = 10/5 = 2.0 Sequence 2: IC = 6 Clock Cycles = 4×1 + 1×2 + 1×3 = 9 Avg. CPI = 9/6 = 1.5

Performance Summary Performance depends on – Algorithm: affects IC, possibly CPI – Programming language: affects IC, CPI – Compiler: affects IC, CPI – Instruction set architecture: affects IC, CPI, T c Chapter 1 — Computer Abstractions and Technology — 13 The BIG Picture

Power Trends In CMOS IC technology Chapter 1 — Computer Abstractions and Technology — 14 ×1000 ×30 5V → 1V

Reducing Power Suppose a new CPU has – 85% of capacitive load of old CPU – 15% voltage and 15% frequency reduction Chapter 1 — Computer Abstractions and Technology — 15 The power wall We can’t reduce voltage further We can’t remove more heat How else can we improve performance?

Uniprocessor Performance Chapter 1 — Computer Abstractions and Technology — 16 Constrained by power, instruction-level parallelism, memory latency

Multiprocessors Multicore microprocessors – More than one processor per chip Requires explicitly parallel programming – Compare with instruction level parallelism Hardware executes multiple instructions at once Hidden from the programmer – Hard to do Programming for performance Load balancing Optimizing communication and synchronization Chapter 1 — Computer Abstractions and Technology — 17

Manufacturing ICs Yield: proportion of working dies per wafer Chapter 1 — Computer Abstractions and Technology — 18

AMD Opteron X2 Wafer X2: 300mm wafer, 117 chips, 90nm technology X4: 45nm technology Chapter 1 — Computer Abstractions and Technology — 19

Integrated Circuit Cost Nonlinear relation to area and defect rate – Wafer cost and area are fixed – Defect rate determined by manufacturing process – Die area determined by architecture and circuit design Chapter 1 — Computer Abstractions and Technology — 21

SPEC CPU Benchmark Programs used to measure performance Supposedly typical of actual workload Standard Performance Evaluation Corp (SPEC) Develops benchmarks for CPU, I/O, Web, … SPEC CPU2006 Elapsed time to execute a selection of programs Negligible I/O, so focuses on CPU performance Normalize relative to reference machine Summarize as geometric mean of performance ratios CINT2006 (integer) and CFP2006 (floating-point) Chapter 1 — Computer Abstractions and Technology — 22

CINT2006 for Opteron X Chapter 1 — Computer Abstractions and Technology — 23 NameDescriptionIC×10 9 CPITc (ns)Exec timeRef timeSPECratio perlInterpreted string processing2, , bzip2Block-sorting compression2, , gccGNU C Compiler1, , mcfCombinatorial optimization ,3459, goGo game (AI)1, , hmmerSearch gene sequence2, , sjengChess game (AI)2, , libquantumQuantum computer simulation1, ,04720, h264avcVideo compression3, , omnetppDiscrete event simulation , astarGames/path finding1, , xalancbmkXML parsing1, ,1436, Geometric mean11.7 High cache miss rates

SPEC Power Benchmark Power consumption of server at different workload levels – Performance: ssj_ops/sec – Power: Watts (Joules/sec) Chapter 1 — Computer Abstractions and Technology — 24

SPECpower_ssj2008 for X4 Chapter 1 — Computer Abstractions and Technology — 25 Target Load %Performance (ssj_ops/sec)Average Power (Watts) 100%231, %211, %185, %163, %140, %118, %920, %70, %47, %23, %0141 Overall sum1,283,5902,605 ∑ssj_ops/ ∑power493

Pitfall: Amdahl’s Law Improving an aspect of a computer and expecting a proportional improvement in overall performance Chapter 1 — Computer Abstractions and Technology — 26 Can’t be done! Example: multiply accounts for 80s/100s How much improvement in multiply performance to get 5× overall? Corollary: make the common case fast

Fallacy: Low Power at Idle Look back at X4 power benchmark – At 100% load: 295W – At 50% load: 246W (83%) – At 10% load: 180W (61%) Google data center – Mostly operates at 10% – 50% load – At 100% load less than 1% of the time Consider designing processors to make power proportional to load Chapter 1 — Computer Abstractions and Technology — 27

Pitfall: MIPS as a Performance Metric MIPS: Millions of Instructions Per Second – Doesn’t account for Differences in ISAs between computers Differences in complexity between instructions Chapter 1 — Computer Abstractions and Technology — 28 CPI varies between programs on a given CPU

Concluding Remarks Cost/performance is improving – Due to underlying technology development Hierarchical layers of abstraction – In both hardware and software Instruction set architecture – The hardware/software interface Execution time: the best performance measure Power is a limiting factor – Use parallelism to improve performance Chapter 1 — Computer Abstractions and Technology — 29