High Speed Stepped Electronic Load for Dynamic Testing of DC/DC Converters TEAM MEMBERS: Sean Kenney Brian Sicard Mark Thomas ECE ADVISOR: Kuan Zhou INDUSTRY.

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Presentation transcript:

High Speed Stepped Electronic Load for Dynamic Testing of DC/DC Converters TEAM MEMBERS: Sean Kenney Brian Sicard Mark Thomas ECE ADVISOR: Kuan Zhou INDUSTRY ADVISOR: John Canfield

Sean Kenney PROBLEM DEFINITION

Dynamic testing of DC/DC converters Available solutions on the market

Sean Kenney DESIGN GOALS

To design/build an active load with the following qualities: – Wide voltage compliance range – Very fast stepping rate – Wide range of settable currents – Unconditionally stable

HARDWARE IMPLEMENTATION Mark Thomas

Implementation Phases for Each Sub-Circuit

Implementation Process Research Solutions Choose Solution Design Solution Test Components Design Review Prototype Construction Prototype Testing Final Design Review PCB Implementation

Sub-Circuits and Components Power DAC – Power DAC Current Sinking FET Network – Current Sense – Voltage Sense Power Management – Voltage Regulators Thermal Measurement – Current Source – High Accuracy Differential Amplifier Miscellaneous – Op Amp Buffers to Provide Circuit Isolation – MOSFET Switches – Pull-up/down Resistors

Brian Sicard

DEVELOPMENT PHASES

FAMILIARIZATION Purpose of Familiarization Phase MSP430 Development Tools Development Software

ALGORITHMS Familiarization++

Brian Sicard

TEST PHASES

TEST MOTIVATION Component/Device Behavior Sub-Circuit Functionality Algorithm Functionality Sub-Circuit Functionality W/Algorithms Total Design Functionality Prototype Functionality

Sean Kenney ESTIMATED TIMELINE

Sean Kenney BUDGET ESTIMATE

Total Budget Estimate: $ Budget covered by Linear Technology