1 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Performance Analysis of Embedded Systems Lothar Thiele ETH Zurich

2 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Modular Performance Analysis Real-Time Calculus Modeling Application Scenarios

3 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory System Composition Scheduling and Arbitration Templates proportional share WFQ staticdynamic fixed priority EDF TDMA FCFS Communication TemplatesComputation Templates DSP CC CC CAN interface SDRAM RISC ECU Architecture RISC SDRAM ECU priority EDF ECU

4 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Role of Performance Estimation Design validation: equivalence of specification and implementation validation of non-functional aspects (power consumption, throughput, delay) Prerequisite for design space exploration: part of feedback cycle in design Performance estimation methods: use of simulation, trace-based estimation and analytic methods

5 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Exploration ApplicationArchitecture Mapping Estimation Takes place on several levels of abstraction

6 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Why Is Estimation Difficult ? Non-determinism: Uncertain system environment (different load scenarios, unknown (worst case) input patterns). Data dependent functional behavior. Analyzability: Complex hardware and software interactions in processing nodes, communication components, scheduling and arbitration policies. Use of abstractions in analysis -> non-determinism. Interference: Internal data streams interact on computing and communication resources. This interference determines stream characteristics (cyclic dependency).

7 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Why is Estimation Difficult ? EPU application structure hardware platform

8 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Bounds, Guarantees and Predictability t 0best case worst case upper bound lower bound variation of execution time w.c. performance w.c. guarantee best case predictabilityworst case predictability

9 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Composable Performance Analysis Real-Time Calculus Modeling Application Scenarios

10 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory A Four-Step Approach 1.Abstraction: Build abstract models for “first class citizens” event streams -> abstract event streams architecture elements -> resource modules application processes -> performance modules 2.Performance Components: Combine performance modules using resource sharing information 3.Performance Network: Combine all models to a network that represents the performance aspects 4.Analysis

11 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory The “Big Picture” Application Specification Abstract Application Abstract Architecture Architecture Specification Performance Network T1T2T3 ARM9DSP load scenarios architectur e elements mapping relations application process event streams resource modules performance modules abstract event streams abstract load scenarios performance components

12 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Step 1: Abstract Application Model From a functional model… event stream application process (e.g. StateCharts … )

13 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Step 1: Abstract Functional Units … to an abstract application model performance module abstract event stream abstract resource stream How do we calculate with abstract event streams and resources units? We use Real-Time Calculus! (min-max algebra) We use Real-Time Calculus! (min-max algebra)

14 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Step 2: Build Performance Components How do we do scheduling?

15 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Step 2: Scheduling I Fixed Priority (FP)

16 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Step 2: Scheduling II share  Generalized Processor Sharing (GPS) Performance component of a combined HW/SW/OS module; exposes performance properties but hides implementation

17 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Step 3 and 4: Compose and Analyze ARM9 DSP2 Bus DSP1  ’’ ’’ ’’ FP GPS FP    GPS FP ’’ ’’   Application 1 Application 2 How can we compose performance modules ? How can we add a new application? How can we estimate the load on resources? How can we estimate delay and memory?

18 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Dynamic Analytic Models input traces model of environment formal specific. formal specification system model analysis data sheets model of components program analysis estimation results

19 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Modular Performance Analysis Real-Time Calculus Modeling Application Scenarios

20 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Scheduling Abstraction Idea: unified view of task scheduling, arbitration and output scheduling in networks: methods: queueing theory (statistical bounds, Markov chains) real-time calculus (worst case bounds, min-max algebra)

21 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Foundations of Real-Time-Calculus Linear System Theory [Baccelli, Cohen, Olsder, Quadrat 1992] Calculus for Networks [Le Boudec 1998, 2001], [Cruz 1991] Adversarial Queuing Theory [Andrews, Borodin, Kleinberg, Leighton, … 1996] End-to-end deadlines [Parekh, Gallager 1994]

22 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Event and Resource Models How do we describe uncertain event streams and resources?

23 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Arrival and Service Curves

24 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory max: 2 packets min: 0 packets max: 3 packets min: 1 packet uu ll   Event & Resource Models Use arrival curves to capture packet streams: time t max: 1 packet min: 0 packets  012 # of packets 1 2 3

25 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Arrival Curves Use the concept of arrival curves ! How do we describe uncertain input streams ? maximum/minimum number of packets in any interval of length 4 number of packets in time interval [0,4]

26 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Service Curves Use the concept of service curves ! How do we describe uncertain resources ? maximum/minimum computing power in any interval of length 2 computing power in time interval [0,2]

27 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Arrival and Service Curves What else: sub- and super-additivity relation to max-+ algebra operations correspond to convolution

28 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Transformation of Curves by Modules

29 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Performance Modules

30 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Compose and Analyze PP DSP I/O bus fixed prio. prop. share fixed prio.

31 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Compose and Analyze delay d backlog b service curve  l arrival curve  u b

32 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Everything Together App. Model Architecture Model Performance Network Allocation Binding Scheduling resource model performance memory delay application structure input stream model TDMA fixed priority WFQ

33 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Modular Performance Analysis Real-Time Calculus Modeling Application Scenarios

34 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Open Questions How do we model different event types and correlation in event streams ? How do we model type-dependent processing (different modes of operation, example MPEG coding and decoding) ? How do we model caches ? Use more involved abstractions, for example finite state automata Use more involved abstractions, for example finite state automata

35 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Refined Abstractions using FSMs

36 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Event Stream Model #events vs. time intervalorder of events

37 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Functional Unit Model FSM can model architecture details program flow scheduling policies type-dependent behavior Improvement in estimation quality in several application studies. input_event/resource_demand/output_event

38 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Additional Analysis Methods Analyze timed FSMs with respect to their timing properties. For example: Applicable methods: minimum cycle mean [Karp], periodic graphs [Cohen, Dubois, Quadrat] minimal and maximal accumulated delay/demand/events for n consecutive transitions (and its inverse) in a compact representation minimal and maximal accumulated delay/demand/events for n consecutive transitions (and its inverse) in a compact representation

39 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Missing Link(s) Link to lower layer analysis methods (like abstract interpretation) assembler program model of computer architecture analysis a,b,c d,e,f,g

40 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Overview Review of General Aspects Modular Performance Analysis Real-Time Calculus Modeling Application Scenarios

41 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Experiences Network processor modeling (IBM) Detailed study of a network processor Good match between simulation and analytic methods (delay, memory) Use of methodology in other projects and case studies BridgeCo Siemens Netmodule Implementation and integration into design space exploration

42 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Application Model Example of a simple stream processing task structure:

43 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Architecture Model In general, we assume an arbitrary heterogeneous architecture consisting of computing resources, memory and communication resources.

44 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Design Space Exploration Strategy

45 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Exploration Cycle EXPO – Tool architecture MOSES EXPOSPEA 2 selection of “good” architectures system architecture performance values task graph, scenario graph, flows & resources

46 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory EXPO - Tool Tool available online: Tool available online:

47 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Results Performance for encryption/decryption Performance for RT voice processing

48 Swiss Federal Institute of Technology Computer Engineering and Networks Laboratory Acknowledgement The presentation contains contributions by Samarjit Chakraborty Matthias Dyer Simon Künzli Matthias Gries Alexander Maxiaguine