Discussion. What is predictability? Is it another word for: “Degree of variance”, “Degree of analyzability”, “Repeatability”, “Determinism” What is the.

Slides:



Advertisements
Similar presentations
An Overview Of Virtual Machine Architectures Ross Rosemark.
Advertisements

Computer Organization and Architecture
Test practice Multiplication. Multiplication 9x2.
Multicore Architecture for Critical Real-Time Embedded Systems Multicores in CRTEs: Critical Real-Time Embedded Systems (CRTESs) are in everyday life CRTESs.
Parallel Programming Motivation and terminology – from ACM/IEEE 2013 curricula.
Project outline  EMCROSS - European Multicore Cross-Domain Architecture  Jürgen Meilinger, Airbus Defence and Space,  Cross-domain.
Review: Multiprocessor Systems (MIMD)
 Introductions  Charge from President Blake  Timeline  Structure  Outcomes.
Memory Consistency in Vector IRAM David Martin. Consistency model applies to instructions in a single instruction stream (different than multi-processor.
Oct. 15, 2009RePP Reconciling Predictability with Performance - the questions we asked - Reinhard Wilhelm Saarland University.
Chapter 9 DATA WAREHOUSING Transparencies © Pearson Education Limited 1995, 2005.
Instruction Level Parallelism (ILP) Colin Stevens.
Software Group © 2006 IBM Corporation Compiler Technology Task, thread and processor — OpenMP 3.0 and beyond Guansong Zhang, IBM Toronto Lab.
Chapter Hardwired vs Microprogrammed Control Multithreading
My view of challenges faced by Open64 Xiaoming Li University of Delaware.
1 Dr. Frederica Darema Senior Science and Technology Advisor NSF Future Parallel Computing Systems – what to remember from the past RAMP Workshop FCRC.
DATA WAREHOUSING.
Synergistic Processing In Cell’s Multicore Architecture Michael Gschwind, et al. Presented by: Jia Zou CS258 3/5/08.
CS294-6 Reconfigurable Computing Day 3 September 1, 1998 Requirements for Computing Devices.
CprE 458/558: Real-Time Systems
Marco Paolieri RePP Workshop October 15 th 1 Efficient Execution of Mixed Application Workloads in a Hard Real-Time Multicore System Marco Paolieri (BSC/UPC)
Lecture 37: Chapter 7: Multiprocessors Today’s topic –Introduction to multiprocessors –Parallelism in software –Memory organization –Cache coherence 1.
Energy Model for Multiprocess Applications Texas Tech University.
Out-of-Order OpenRISC 2 semesters project Semester A: Implementation of OpenRISC on XUPV5 board Final A Presentation By: Vova Menis-Lurie Sonia Gershkovich.
© 2009 Mathew J. Sottile, Timothy G. Mattson, and Craig E Rasmussen 1 Concurrency in Programming Languages Matthew J. Sottile Timothy G. Mattson Craig.
Technion – Israel Institute of Technology Department of Electrical Engineering High Speed Digital Systems Lab Spring 2009.
Requirements Determine processor core Determine the number of hardware profiles and the benefits of each profile Determine functionality of each profile.
Kernel, processes and threads Windows and Linux. Windows Architecture Operating system design Modified microkernel Layered Components HAL Interacts with.
Multicore In Real-Time Systems – Temporal Isolation Challenges Due To Shared Resources Ondřej Kotaba, Jan Nowotsch, Michael Paulitsch, Stefan.
Pre-Silicon Simulation of Multi-Core Benchmarks Shubu Mukherjee Principal Engineer Director, SPEARS Group Intel Corporation Panel in Symposium on Workload.
1 Presenter: Min Yu,Lo 2015/10/9 Lauri Matilainen, Erno Salminen, Timo D. Hamalainen, and Marko Hannikainen International Conference on Embedded.
SplitX: Split Guest/Hypervisor Execution on Multi-Core 林孟諭 Dept. of Electrical Engineering National Cheng Kung University Tainan, Taiwan, R.O.C.
Hardware and Software Basics Shirley Moore and Kay Roy CS 1401 Spring 2013 January 24/28, 2013.
Heterogeneous Multikernel OS Yauhen Klimiankou BSUIR
VTU – IISc Workshop Compiler, Architecture and HPC Research in Heterogeneous Multi-Core Era R. Govindarajan CSA & SERC, IISc
Your Perspectives on Transfer: Presenters: Eva Schiorring, M.A. Kelley Karandjeff, Ed.M. Findings from Introduction to Engineering Students at Chabot College,
Scientific Process METHODS Question to Experimental Design to Data Analysis.
Lixia Liu, Zhiyuan Li Purdue University, USA PPOPP 2010, January 2009.
The Government And Service Oriented Architecture Presented by: Dan Pelman.
2-PAD Digital Beamformer Chris Shenton11 th October PAD Digital Beamformer Chris Shenton 11 th October 2007.
By Edward A. Lee, J.Reineke, I.Liu, H.D.Patel, S.Kim
CS 295 – Memory Models Harry Xu Oct 1, Multi-core Architecture Core-local L1 cache L2 cache shared by cores in a processor All processors share.
Platform Abstraction Group 3. Question How to deal with different types hardware and software platforms? What detail to expose to the programmer? What.
EKT303/4 Superscalar vs Super-pipelined.
Portable and Predictable Performance on Heterogeneous Embedded Manycores (ARTEMIS ) ARTEMIS 3 rd Project Review October 2015 WP6 – Space Demonstrator.
… begin …. Parallel Computing: What is it good for? William M. Jones, Ph.D. Assistant Professor Computer Science Department Coastal Carolina University.
Migration Cost Aware Task Scheduling Milestone Shraddha Joshi, Brian Osbun 10/24/2013.
System Architecture Directions for Networked Sensors.
The Scientific Method. The scientific method is the only scientific way accepted to back up a theory or idea.
Silberschatz, Galvin and Gagne ©2013 Operating System Concepts – 9 th Edition Chapter 4: Threads.
Yes, Data Management Can Be Agile! Michele Goetz, Principal Analyst.
This project and the research leading to these results has received funding from the European Community’s Seventh Framework Programme [FP7 / ]
 A life cycle of product development is commonly referred as the “model”  A simple model contains five phases  Requirement analysis  Design  Development.
AUTONOMIC COMPUTING B.Akhila Priya 06211A0504. Present-day IT environments are complex, heterogeneous in terms of software and hardware from multiple.
Implementing RISC Multi Core Processor Using HLS Language - BLUESPEC Liam Wigdor Instructor Mony Orbach Shirel Josef Semesterial Winter 2013.
Topics to be covered Instruction Execution Characteristics
Multicore, Multithreaded, Multi-GPU Kernel VSIPL Standardization, Implementation, & Programming Impacts Anthony Skjellum, Ph.D.
Fault-Tolerant NoC-based Manycore system: Reconfiguration & Scheduling
Computer Architecture 2
Chapter 4: Threads.
Intro to Architecture & Organization
LAB 01 Installation of VIRTUAL MACHINE and LINUX
Scientific Process METHODS
Fine-grained vs Coarse-grained multithreading
Multi Core Processing What is term Multi Core?.
EE 4xx: Computer Architecture and Performance Programming
CS 286 Computer Organization and Architecture
Use-Case Design in Context
ALF Amdhal’s Law is Forever
Presentation transcript:

Discussion

What is predictability? Is it another word for: “Degree of variance”, “Degree of analyzability”, “Repeatability”, “Determinism” What is the notion of a system in this context (model, physical implementation)?

How much performance is one prepared to pay for predictability? How quantify the loss of performance? -Programmer/Development time? -Hardware cost? -Execution time?

How to design multicore architectures? If some core are HRT, can NHRT benefit from knowing this? Can we use high performance cores (like multiple issue, super scalar, e.g. ATOM) Is the memory architecture we have seen today the right one?

When does the RT community deal with realistic platform models?