T.Stobiecki Katedra Elektroniki AGH Magnetic Tunnel Junction (MTJ) or Tunnel Magnetoresistance (TMR) or Junction Magneto- Resistance (JMR) 11 wykład

Spin Polarization, Density of States Ferromagnetic metal (Fe) Spin Polarization Density of states 3d Ni 33 % Co 42 % Fe 45 % Ni 80 Fe % Co 84 Fe % CoFeB 60% Material Polarizations Normal metal (Cu)

Tunneling in FM/I/FM junction FM I (P I ) FM II (P II ) Barrier eV

Type of MTJs Standard junction FM I I I Spin valve junction (SV- MTJ) Double barrier junction B AF FM I

Application-Oriented Properties of S-V MTJ Tunnel Magnetoresistance -TMR Resistance area product -RxA Interlayer coupling field H S Exchange bias field H EXB Coercive field pinned H CP and free H CF layer Switching field H SF Magnetic Materials I (Al-O,MgO..) FM (Co, CoFe, NiFe) AF (MnIr, PtMn, NiO) Buffer (Ta,Cu, NiFe) Treatment Annealing Field cooling Preparation Sputtering deposition Oxidation SV-MTJ Electric

Magnetic and Electric Parameters B AF FM II (Pinned) I FM I (Free) Interlayer coupling H S Exchange coupling H EXB H SF switching fields HSHS H EXB HCPHCP HCFHCF HSF HSF

Applications of SV-MTJ M-RAM SPIN-LOGIC READ HEADS SENSORS SV-MTJ

SV-MTJ Based MRAM Writing - rotation of the free layer Reading - detection of a resistance of a junction SV- MTJ as MRAM component must fulfill requirements - Thermal stability - Magnetic stability - Single domain like switching behaviour - Reproducibility of RxA, TMR and Asteroids H y /H(0) Critical switching fields H x, H y (S-W) asteroid Motorola: S.Tehrani et al. PROCEEDINGS OF THE IEEE, VOL. 91, NO. 5, MAY 2003

Features of M-RAM - Non-volatility of FLASH with fast programming, no program endurance limitation - Density competitive with DRAM, with no refresh - Speed competitive with SRAM - Nondestructive read - Resistance to ionization radiation - Low power consumption (current pulses) Single 3.3 V power supply Commercial temperature range (0°C to 70°C) Symmetrical high-speed read and write with fast access time (15, 20 or 25 ns) Flexible data bus control — 8 bit or 16 bit access Equal address and chip-enable access times All inputs and outputs are transistor-transistor logic (TTL) compatible Full nonvolatile operation with 10 years minimum data retention Motorola: S.Tehrani et al. PROCEEDINGS OF THE IEEE, VOL. 91, NO. 5, MAY 2003

SV-MTJ Based Spin Logic Gates Siemens & Univ. Bielefeld: R. Richter et al. J. Magn.Magn. Mat. 240 (2002) 127–129 SV- MTJ as spin logic gates must fulfill requirements - Thermal stability - Magnetic stability - Centered minor loop - Single domain like switching behaviour - Reproducibility of R, TMR V OUT = I S (R MTJ3 + R MTJ3 – R MTJ1 – R MTJ2 )

Features of Spin Logic Gates - Programmable logic functions (reconfigurable computing) - Non-volatile logic inputs and outputs - Fast operation (up to 5 GHz) - Low power consumption - Compatibility to M-RAM

SV-MTJ Based Read Heads SV-MTJ as a read sensor for high density (> 100Gb/in 2 ) must fulfill requirements - Resistance area product (RxA) < 6  -  m 2 - High TMR at low RxA

Experiments on SV -MTJs A MTJs Substrate Si (100) Cu 25 nm MnIr 12 nm CoFe t nm Al 2 O nm NiFe 3 nm Ta 5 nm Cu 30 nm Ta 3 nm Au 25 nm Substrate Si (100) SiO 2 Ta 5 nm Cu 10 nm Ta 5 nm NiFe 2 nm Cu 5 nm MnIr 10 nm CoFe 2.5 nm Al 2 O nm CoFe 2.5 nm NiFe x nm Ta 5 nm B MTJs A structure prof. G. Reiss laboratory University Bielefeld B structure prof. T. Takahasi laboratory, Tohoku University 10mm Junction Junctions size (180  180)  m 2

Effect of Annealing on TMR As deposited Annealed 10 mm H=80 kA/m annealing 1 hour in vacuum hPa

Interlayer and Exchange Coupling Fields A MTJs B MTJs Exchange coupling fields Interlayer coupling fields

Interlayer and Exchange Coupling Fields

Temperature Dependence of TMR P. Wiśniowski, M.Rams,... Temperature dependence of tunnel magnetoresistance of IrMn based MTJ, phys. stat. sol (2004)

Total Conductance Varies slightly with T Varies with T as magnetization does Bloch law Negligible Dominant

Polarization, Bloch Law 100 nm AP P 1. Set H= – 2000 Oe 2. Cooling H= 500 Oe 3. Measured M (T) 1. Set H= – 2000 Oe 2. Cooling H= –500 Oe 3. Measured M (T)

Spin Independent Conductance Hopping conductance, low level of defects Hopping conductance, high level of defects

TIMARIS: Tool status Tool #1 – process optimization on  200 mm wafers since mid of March 03 Tool #2 – The Worlds 1 st  300 mm MRAM System is Ready for Process in August 03 Multi (10) Target Module Oxidation / Pre-clean Module Transport Module Clean room

Sputtering System Metal depo. Plasma Oxidation LL １ : wafer-in LL ２ : Bridge Reactive sputter : surface smooth

Measurements R-VSM MOKE

MOKE with Orthogonal Coils