Chapter 2: Data Manipulation

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Presentation transcript:

Chapter 2: Data Manipulation

Chapter 2: Data Manipulation 2.1 Computer Architecture 2.2 Machine Language 2.3 Program Execution 2.4 Arithmetic/Logic Instructions 2.5 Communicating with Other Devices 2.6 Other Architectures

Computer Architecture Central Processing Unit (CPU) or processor Arithmetic/Logic unit versus Control unit Registers General purpose Special purpose Bus Motherboard

Figure 2.1 CPU and main memory connected via a bus

Stored Program Concept A program can be encoded as bit patterns and stored in main memory. From there, the CPU can then extract the instructions and execute them. In turn, the program to be executed can be altered easily.

Terminology Machine instruction: An instruction (or command) encoded as a bit pattern recognizable by the CPU Machine language: The set of all instructions recognized by a machine

Machine Language Philosophies Reduced Instruction Set Computing (RISC) Few, simple, efficient, and fast instructions Examples: PowerPC from Apple/IBM/Motorola and SPARK from Sun Microsystems Complex Instruction Set Computing (CISC) Many, convenient, and powerful instructions Example: Pentium from Intel

Machine Instruction Types Data Transfer: copy data from one location to another Arithmetic/Logic: use existing bit patterns to compute a new bit patterns Control: direct the execution of the program

Figure 2.2 Adding values stored in memory

Figure 2.3 Dividing values stored in memory

Figure 2.4 The architecture of the machine described in Appendix C

Parts of a Machine Instruction Op-code: Specifies which operation to execute Operand: Gives more detailed information about the operation Interpretation of operand varies depending on op-code

Figure 2.5 The composition of an instruction for the machine in Appendix C

Figure 2.6 Decoding the instruction 35A7

Figure 2.7 An encoded version of the instructions in Figure 2.2

Program Execution Controlled by two special-purpose registers Program counter: address of next instruction Instruction register: current instruction Machine Cycle Fetch Decode Execute

Figure 2.8 The machine cycle

Figure 2.9 Decoding the instruction B258

Figure 2. 10 The program from Figure 2 Figure 2.10 The program from Figure 2.7 stored in main memory ready for execution

Figure 2.11 Performing the fetch step of the machine cycle

Figure 2.11 Performing the fetch step of the machine cycle (cont’d)

Arithmetic/Logic Operations Logic: AND, OR, XOR Masking Rotate and Shift: circular shift, logical shift, arithmetic shift Arithmetic: add, subtract, multiply, divide Precise action depends on how the values are encoded (two’s complement versus floating-point).

Figure 2.12 Rotating the bit pattern 65 (hexadecimal) one bit to the right

Communicating with Other Devices Controller: An intermediary apparatus that handles communication between the computer and a device Specialized controllers for each type of device General purpose controllers (USB and FireWire) Port: The point at which a device connects to a computer Memory-mapped I/O: CPU communicates with peripheral devices as though they were memory cells

Figure 2.13 Controllers attached to a machine’s bus

Figure 2.14 A conceptual representation of memory-mapped I/O

Communicating with Other Devices (continued) Direct memory access (DMA): Main memory access by a controller over the bus Von Neumann Bottleneck: Insufficient bus speed impedes performance Handshaking: The process of coordinating the transfer of data between components

Communicating with Other Devices (continued) Parallel Communication: Several communication paths transfer bits simultaneously. Serial Communication: Bits are transferred one after the other over a single communication path.

Data Communication Rates Measurement units Bps: Bits per second Kbps: Kilo-bps (1,000 bps) Mbps: Mega-bps (1,000,000 bps) Gbps: Giga-bps (1,000,000,000 bps) Bandwidth: Maximum available rate

Other Architectures Technologies to increase throughput: Pipelining: Overlap steps of the machine cycle Parallel Processing: Use multiple processors simultaneously SISD: No parallel processing MIMD: Different programs, different data SIMD: Same program, different data