doc.: IEEE 802.15-<doc#> <month year> doc.: IEEE 802.15-<doc#> Sept 2004 Project: IEEE P802.15 Working Group for Wireless Personal Area Networks (WPANs) Submission Title: [Comparison of IEEE 802.15.4b High Rate Alt-PHY proposals] Date Submitted: [13 Sept, 2004] Source: [Francois Chin] Company: [Institute for Infocomm Research, Singapore] Address: [21 Heng Mui Keng Terrace, Singapore 119613] Voice: [65-68745684] FAX: [65-67768109] E-Mail: [chinfrancois@i2r.a-star.edu.sg] Re: [Response to the call for proposal of IEEE 802.15.4b, Doc Number: 15-04-0239-00-004b] Abstract: [This presentation compares all proposals for the IEEE802.15.4b PHY standard.] Purpose: [Proposal to IEEE 802.15.4b Task Group] Notice: This document has been prepared to assist the IEEE P802.15. It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein. Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P802.15. Francois Chin, Institute for Infocomm Research (I2R) <author>, <company>

Summary of Proposed Code Sets Sept 2004 Code Set A32 B16 C8 D8 E16 F31 G16 Description 32-chip (15.4 original) 16-chip 8-chip for Coh. Chip Despreading 8-chip for Diff. Chip Despreading Orthogonal 16-DSSS PSSS 16-chip for Coh. Chip Despreading Proposer Motorola / Freescale I2R Helicomm Dr. Wolf & Assoc. Doc # 04-189 04-403 04-507(new) 04-314 04-121 Sym-Chip mapping Cyclic & Odd Bit Inversion (COBI) Orthogonal Multi-code Bit/sym 4 3 15 Chip/Sym 32 16 8 31+1 cyclic extension 16+1 cyclic extension Bit/chip 0.125 0.25 0.5 0.375 ~0.47 ~0.24 Root Sequence D9C3522E 3AFC 5C 45 N.A. 08B3E375 2F53 Coh. Chip Despreading (CCD) Yes Differential Chip Despreading (DCD) No Francois Chin, Institute for Infocomm Research (I2R)

BER Performance Comparison Sept 2004 BER Performance Comparison Code Sequence A32 D8 B16 C8 E16 Performance of proposed 16-chip and 8-chip code sets, in comparison with original 802.15.4 PHY length-32 Symbol-to-Chip performance and Orthogonal DSSS sequences as in 15-04-0314-00-004b-enhanced-oqpsk-modulation-with-orthogonal-dsss-sequences Francois Chin, Institute for Infocomm Research (I2R)

Comparison Methodology Sept 2004 Comparison Methodology Multipath robustness performance Bandwidth efficiency (bps / Hz) RF requirement Memory requirement Francois Chin, Institute for Infocomm Research (I2R)

Multipath Realisations Sept 2004 Multipath Realisations 100 Channel Realisations at each RMS Delay Spread Francois Chin, Institute for Infocomm Research (I2R)

Multipath Realisations Sept 2004 Multipath Realisations 100 Channel Realisations at each RMS Delay Spread Francois Chin, Institute for Infocomm Research (I2R)

Sept 2004 Candidates for Multipath Performance Comparison (using Coherent Chip Despreading) Code Set A32 B16 D8 Description 32-chip (15.4 original) 16-chip 8-chip for Diff. Chip Despreading Proposer Motorola / Freescale I2R Doc # 04-189 04-403 Sym-Chip mapping Cyclic & Odd Bit Inversion (COBI) Bit/sym 4 3 Chip/Sym 32 16 8 Bit/chip 0.125 0.25 0.375 Root Sequence D9C3522E 3AFC 45 Coh. Chip Despreading (CCD) Yes Differential Chip Despreading (DCD) Francois Chin, Institute for Infocomm Research (I2R)

Proposed Symbol-to-Chip Mapping (16-chip Code Set B16) Sept 2004 Proposed Symbol-to-Chip Mapping (16-chip Code Set B16) Decimal Value Binary Symbol Chip Value 0000 0 0 1 1 1 0 1 0 1 1 1 1 1 1 0 0 (Root - 3AFC) 1 1000 0 0 0 0 1 1 1 0 1 0 1 1 1 1 1 1 2 0100 1 1 0 0 0 0 1 1 1 0 1 0 1 1 1 1 3 1100 1 1 1 1 0 0 0 0 1 1 1 0 1 0 1 1 4 0010 1 1 1 1 1 1 0 0 0 0 1 1 1 0 1 0 5 1010 1 0 1 1 1 1 1 1 0 0 0 0 1 1 1 0 6 0110 1 0 1 0 1 1 1 1 1 1 0 0 0 0 1 1 7 1110 1 1 1 0 1 0 1 1 1 1 1 1 0 0 0 0 8 0001 0 1 1 0 1 1 1 1 1 0 1 0 1 0 0 1 9 1001 0 1 0 1 1 0 1 1 1 1 1 0 1 0 1 0 10 0101 1 0 0 1 0 1 1 0 1 1 1 1 1 0 1 0 11 1101 1 0 1 0 0 1 0 1 1 0 1 1 1 1 1 0 12 0011 1 0 1 0 1 0 0 1 0 1 1 0 1 1 1 1 13 1011 1 1 1 0 1 0 1 0 0 1 0 1 1 0 1 1 14 0111 1 1 1 1 1 0 1 0 1 0 0 1 0 1 1 0 15 1111 1 0 1 1 1 1 1 0 1 0 1 0 0 1 0 1 The sequences are related to each other through cyclic shifts and/or conjugation (i.e., inversion of odd-indexed chip values) Francois Chin, Institute for Infocomm Research (I2R)

Other Root Sequences (16-chip Code Set B16) Sept 2004 Other Root Sequences (16-chip Code Set B16) The following Root Sequences are found through exhaustive search with identical low cross correlation and autocorrelation, in base 10: 141 177 282 311 354 473 537 564 609 708 965 1074 1127 1128 1205 1218 1244 1310 1385 1416 1475 1565 1841 1892 2067 2148 2256 2405 2436 2747 2832 3095 3201 3541 3775 3860 4107 4134 4211 4296 4508 4512 4820 4872 4901 4976 5077 5135 5240 5273 5330 5411 5494 5497 5540 5581 5587 5664 5749 5900 6260 6293 6402 6517 6593 6657 7082 7364 7430 7568 7685 8110 8214 8259 8268 8525 8592 8879 8981 9024 9211 9491 9542 9620 9744 9797 9982 10154 10988 10994 11162 11174 11245 11328 11498 11585 11755 11939 12190 12279 12380 12417 12551 12626 12637 12804 12881 13034 13246 13314 13399 13445 14011 14081 14164 14319 14987 15031 15100 15331 15357 15440 15610 15697 15867 16015 16102 16306 16419 16428 16502 16518 16536 16625 16685 16730 16775 16844 16985 17184 17269 17609 17653 17702 17758 17779 17821 17957 18013 18032 18048 18305 18515 18629 18833 19195 19280 19488 19543 19604 19745 19904 20223 20308 20540 20555 20630 20701 20786 20797 20839 20873 20887 20960 21041 21092 21320 21559 21583 21602 21644 21976 21988 22160 22324 22348 22369 22417 22656 22850 22996 23105 23530 23600 23761 23857 23878 23941 24133 24558 24834 24919 25040 25089 25172 25274 25582 25607 25608 25682 25865 26068 26347 26372 26449 26559 26628 26798 26885 27055 27367 27571 27610 28328 28342 28585 28638 28642 28691 28742 28865 29439 29456 29509 29611 29720 29893 29974 29977 30019 30229 30272 30382 30714 30740 30910 30997 31167 31394 31435 31734 32440 32463 …. Francois Chin, Institute for Infocomm Research (I2R)

Proposed Symbol-to-Chip Mapping (8-chip Code Set D8) Sept 2004 Proposed Symbol-to-Chip Mapping (8-chip Code Set D8) 3-bit / symbol mapping Decimal Value Binary Symbol Chip Value 000 0 1 0 0 0 1 0 1 (root – 45h) 1 100 0 1 0 1 0 0 0 1 2 010 0 1 0 1 0 1 0 0 3 110 0 0 0 1 0 1 0 1 4 001 0 0 0 1 0 0 0 0 5 101 0 0 0 0 0 1 0 0 6 011 0 0 0 0 0 0 0 1 7 111 0 1 0 0 0 0 0 0 The sequences are related to each other through cyclic shifts and/or conjugation (i.e., inversion of odd-indexed chip values) Francois Chin, Institute for Infocomm Research (I2R)

Other Root Sequences (8-chip Code Set D8) Sept 2004 Other Root Sequences (8-chip Code Set D8) The following Root Sequences are found through exhaustive search with identical low cross correlation and autocorrelation, in base 10: 1 4 16 21 64 69 81 84 171 174 186 191 234 239 251 254 Francois Chin, Institute for Infocomm Research (I2R)

AWGN Performance (Differential Chip Despreading) Sept 2004 Performance comparison 32-chip ~ 8-chip (3/8 bit/chip) > 16-chip Francois Chin, Institute for Infocomm Research (I2R)

Multipath Performance (Differential Chip Despreading) Sept 2004 Performance - 32-chip (1/8 bit/chip) > 16-chip (1/4 bit/chip) > 8-chip (3/8 bit/chip) Francois Chin, Institute for Infocomm Research (I2R)

Multipath Performance (Differential Chip Despreading) Sept 2004 @ 1us RMS delay spread (RMS delay spread / chip period > 0.3), no apparent BER floor Francois Chin, Institute for Infocomm Research (I2R)

Multipath Performance (Differential Chip Despreading) Sept 2004 @ 2us RMS delay spread (RMS delay spread / chip period < 0.6), apparent BER floor Francois Chin, Institute for Infocomm Research (I2R)

Multipath Performance Summary (Differential Chip Despreading) Sept 2004 Multipath Performance Summary (Differential Chip Despreading) When RMS delay spread / chip period > 0.3, inter–chip interference (ICI) sets in Sequence length helps, but does not eliminate ICI …. Coherent chip despreading is explored next …. Francois Chin, Institute for Infocomm Research (I2R)

Sept 2004 Candidates for Multipath Performance Comparison (using Coherent Chip Despreading) Code Set C8 E16 F31 G16 Description 8-chip for Coh. Chip Despreading Orthogonal 16-DSSS PSSS 16-chip for Coh. Chip Despreading Proposer I2R Helicomm Dr. Wolf & Assoc. Doc # 04-507 04-314 04-121 04-507(new) Sym-Chip mapping Cyclic & Odd Bit Inversion Orthogonal Multi-code Bit/sym 4 15 Chip/Sym 8+1 cyclic extension 16+1 cyclic extension 31+1 cyclic extension Bit/chip 0.44 0.25 ~0.47 ~0.24 Root Sequence 5C N.A. 08B3E375 2F53 Coh. Chip Despreading (CCD) Yes Differential Chip Despreading (DCD) No Francois Chin, Institute for Infocomm Research (I2R)

Other Root Sequences (8-chip C8 for Coherent Despreading only) Sept 2004 Other Root Sequences (8-chip C8 for Coherent Despreading only) The following Root Sequences are found through exhaustive search with identical low cross correlation and autocorrelation, in base 10: 9 18 23 29 33 36 46 58 66 71 72 92 111 113 116 123 132 139 142 144 163 183 184 189 197 209 219 222 226 232 237 246 Francois Chin, Institute for Infocomm Research (I2R)

DSSS Sequence E16 Sept 2004 Source doc.: IEEE 802.15-04-0314-02-004b Decimal Symbol Binary Symbol Chip Values 0 0 0 0 0 0 1 1 0 1 0 0 0 1 0 0 0 1 0 0 1 1 0 0 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 1 2 0 1 0 0 0 0 0 0 0 1 1 1 0 1 1 1 0 1 1 1 3 1 1 0 0 0 1 0 1 0 0 1 0 0 0 1 0 0 0 1 0 4 0 0 1 0 0 0 1 1 1 0 1 1 0 1 0 0 1 0 1 1 5 1 0 1 0 0 1 1 0 1 1 1 0 0 0 0 1 1 1 1 0 6 1 1 1 0 0 0 0 0 1 0 0 0 0 1 1 1 1 0 0 0 7 0 1 1 1 0 1 0 1 1 1 0 1 0 0 1 0 1 1 0 1 8 0 0 0 1 0 0 1 1 0 1 0 0 1 0 1 1 1 0 1 1 9 1 0 0 1 0 1 1 0 0 0 0 1 1 1 1 0 1 1 1 0 10 0 1 0 1 0 0 0 0 0 1 1 1 1 0 0 0 1 0 0 0 11 1 1 0 1 0 1 0 1 0 0 1 0 1 1 0 1 1 1 0 1 12 0 0 1 1 0 0 1 1 1 0 1 1 1 0 1 1 0 1 0 0 13 1 0 1 1 0 1 1 0 1 1 1 0 1 1 1 0 0 0 0 1 14 0 0 0 0 1 0 0 0 1 0 0 0 0 1 1 1 15 1 1 1 1 0 1 0 1 1 1 0 1 1 1 0 1 0 0 1 0 Source doc.: IEEE 802.15-04-0314-02-004b Francois Chin, Institute for Infocomm Research (I2R)

PSSS Sequence F31 (15 bit/32 chip) Sept 2004 PSSS Sequence F31 (15 bit/32 chip) Source doc.: IEEE 802.15-04-0121-04-004b No Pre-coding is employed in this simulation Francois Chin, Institute for Infocomm Research (I2R)

Other Root Sequences (8-chip G16 for Coherent Despreading only) Sept 2004 Other Root Sequences (8-chip G16 for Coherent Despreading only) The following Root Sequences are found through exhaustive search with identical low cross correlation and autocorrelation, in base 10: 1915 3566 12115 21038 22715 31238 34297 42820 44497 53420 61969 63620 Francois Chin, Institute for Infocomm Research (I2R)

Multipath Performance (Coherent Chip Despreading) Sept 2004 For DSSS, 2 RAKE fingers are required to over BER floor Francois Chin, Institute for Infocomm Research (I2R)

Multipath Performance (Coherent Chip Despreading) Sept 2004 For PSSS, 2 RAKE fingers are required to over BER floor Francois Chin, Institute for Infocomm Research (I2R)

Multipath Performance (Coherent Chip Despreading) Sept 2004 For 8-chip COBI Sequence, 2 RAKE fingers are required to over BER floor Francois Chin, Institute for Infocomm Research (I2R)

Multipath Performance (Coherent Chip Despreading) Sept 2004 For 16-chip COBI Sequence, 2 RAKE fingers are required to over BER floor Francois Chin, Institute for Infocomm Research (I2R)

Coherent Receiver Multipath Performance Sept 2004 Given receiver with 2 RAKE fingers all Sequence gives 2dB ~ 6dB gain by using additional Cyclic-Prefix chip to achieve best performance / data rate trade off PSSS (31+1 chip) > COBI sequence (8+1 chip) > COBI sequence (16+1 chip) > DSSS Sequence (16 +1 chip); all coding schemes are within 3dB from each other Francois Chin, Institute for Infocomm Research (I2R)

Coherent Receiver Multipath Performance Sept 2004 Coherent Receiver Multipath Performance General performance comparison: PSSS (31+1 chip) > COBI sequence (8+1 chip) > COBI sequence (16+1 chip) > DSSS Sequence (16 +1 chip) What leads to Multipath robustness? Frequency selectivity leads to Inter-chip interference, and that is the killer…. To overcome, code must have good autocorrelation properties, i.e. low sidelodes. Francois Chin, Institute for Infocomm Research (I2R)

How these codes achieve Multipath robustness? Sept 2004 How these codes achieve Multipath robustness? PSSS, uses flexibility in amplitude to achieve zero auto-correlation throughout COBI, maintain constant module, can at best achieve zero auto-correlation within 2 chips from cor. Peak; that is good enough to handle ICI of upto 2 chip periods DSSS, comprising Walsh sequences, has auto-correlation sidelodes Francois Chin, Institute for Infocomm Research (I2R)

Multipath Performance Summary (Coherent Chip Despreading) Sept 2004 Multipath Performance Summary (Coherent Chip Despreading) To combat inter-chip interference due to relatively large channel delay spread (RMS delay spread / chip period ~ 0.6), 2 recommendations are: RAKE combining (with 2 fingers) in receiver to combine path diversity; (this does not affect standard) One additional chip extension to the chip sequence to avoid inter-symbol interference (this one does) With the 2 recommendations, @ BER = 10-5 (PER ~ 1% @ 127 byte-packet), all three candidates (namely, DSSS, PSSS (without pre-coding) and 8-chip COBI Sequence) are working within 3dB difference, under large channel delay spread Francois Chin, Institute for Infocomm Research (I2R)

Sept 2004 Candidates for Multipath Performance Comparison (using Coherent Chip Despreading) Code Set C8 E16 F31 G16 Description 8-chip for Coh. Chip Despreading Orthogonal 16-DSSS PSSS 16-chip for Coh. Chip Despreading Proposer I2R Helicomm Dr. Wolf & Assoc. Doc # 04-507 (new) 04-314 04-121 Sym-Chip mapping Cyclic & Odd Bit Inversion Orthogonal Multi-code Bit/sym 4 15 Chip/Sym 8+1 cyclic extension 16+1 cyclic extension 31+1 cyclic extension Bit/chip 0.44 0.25 ~0.47 ~0.24 Multipath performance Better Good Best Memory requirement Low Single sequence High 16 sequence RF linearity requirement Moderate ~ high Note : Red - desirable Francois Chin, Institute for Infocomm Research (I2R)

Code Sequence Recommendations Sept 2004 Code Sequence Recommendations Multipath robustness vs complexity Differential chip despreading can only support multipath channels with RMS delay spread around 1us with chip rate 300kcps (RMS delay spread-chip period ~ 0.3, that means ~ 300ns with half rate 1Mcps, proposed in 915MHz) As multipath robustness is vital, and differential chip despreading does not perform well under channels with excessive delay spread, coherent chip despreading is needed to ensure coverage 8-chip & 16-chip COBI sequence is recommended for its low RF linearity requirement, high bandwidth efficiency and low memory requirement Francois Chin, Institute for Infocomm Research (I2R)

Recommendations for low GHz Bands Sept 2004 Recommendations for low GHz Bands Ch #0 868MHz band Ch #1-10 906 – 924 MHz band Bandwidth 600 kHz 2 MHz Recommended Code Set 8-chip COBI C8 (4/9 bit/chip) 16-chip COBI G16 (4/17 bit/chip)** Receiver Cohent Chip Despreading Chip rate 300kcps 400kcps 1Mcps Pulse shape Half-sine Modulation OQPSK Data rate 133.3 kbps 177.8 kbps 444 kbps 235 kbps ** Code sequence & related multipath robustness performance available soon Francois Chin, Institute for Infocomm Research (I2R)