1. doc.: IEEE 802.15-<doc#>
<month year>
doc.: IEEE <doc#>
Nov 2004
Project: IEEE P Working Group for Wireless Personal Area Networks (WPANs)
Submission Title: [IEEE b High Rate Alt-PHY proposals - Further Performance Comparison]
Date Submitted: [2 Nov, 2004]
Source: [Francois Chin] Company: [Institute for Infocomm Research, Singapore]
Address: [21 Heng Mui Keng Terrace, Singapore ]
Voice: [ ] FAX: [ ]
Re: [Response to the call for proposal of IEEE b, Doc Number: b]
Abstract: [This presentation compares all proposals for the IEEE b PHY standard.]
Purpose: [Proposal to IEEE b Task Group]
Notice: This document has been prepared to assist the IEEE P It is offered as a basis for discussion and is not binding on the contributing individual(s) or organization(s). The material in this document is subject to change in form and content after further study. The contributor(s) reserve(s) the right to add, amend or withdraw material contained herein.
Release: The contributor acknowledges and accepts that this contribution becomes the property of IEEE and may be made publicly available by P
Francois Chin, Institute for Infocomm Research (I2R)
<author>, <company>

2. Nov 2004
Background
Main contribution of current doc is to provide further simulation results based on 1000 channel realisation, for the PHY proposals using coherent detection
Previous comparison used 100 channel realisation, as in IEEE Doc b
Performance comparison herein done with
{0,1,2} cyclic chip extension
{1,2,3} RAKE fingers
Francois Chin, Institute for Infocomm Research (I2R)

3. Nov 2004
Updates
Corrected 3-RAKE multipath performance for all proposals (due to programme bug in previous version)
Included PSSS performance with Precoding
Determined RMS Delay Spread threshold below which cyclic chip extension is not necessary
Stated Recommendation based on realistic channel RMS delay spread
915MHz Transmit PSD for COBI-16
Francois Chin, Institute for Infocomm Research (I2R)

4. Nov 2004
Candidates for Multipath Performance Comparison (using Coherent Chip Despreading)
Code Set
E16
G16 C8
F31
Candidate for
915MHz
868MHz
Description
Orthogonal 16-DSSS
16-chip for Coh. Chip Despreading
8-chip for Coh. Chip Despreading
PSSS
Proposer
Helicomm
I2R
Dr. Wolf & Assoc.
Doc #
04-314
04-507
04-121
Sym-Chip mapping
Orthogonal
Cyclic & Odd Bit Inversion
Multi-code
Bit/sym 4 15
Chip/Sym 16 8
31+1 cyclic extension
Bit/chip
0.25
0.50
~0.47
Root Sequence
N.A.
2F53 5C
08B3E375
Source: b
Francois Chin, Institute for Infocomm Research (I2R)

5. System Parameters for low GHz Bands
Nov 2004
Ch #0
868MHz band
Ch #1-10
906 – 924 MHz
Band
Bandwidth
600 kHz
2 MHz
Code Set Candidate
8-chip COBI C8
PSSS F31
16-chip COBI
G16
DSSS E16
Chip rate
300kcps
400kcps
1Mcps
Pulse shape
Half-sine or Raised cosine (roll off = 0.5)
Raised cosine (roll off = 1)
Raised cosine (roll off = 0.5)
Half-sine
Modulation
OQPSK or BPSK
BPSK/ASK
OQPSK
Data rate
150 kbps
140.6 kbps
200 kbps
187.5 kbps
250 kbps
Francois Chin, Institute for Infocomm Research (I2R)

6. Comparison Methodology
Nov 2004
Comparison Methodology
Multipath robustness performance
Investigation done with
Zero, one and two Cyclic chip(s) extension
One, two & three RAKE fingers
Bandwidth efficiency (bps / Hz)
RF requirement
Memory requirement
Francois Chin, Institute for Infocomm Research (I2R)

7. Multipath Realisations
Nov 2004
Multipath Realisations
1000 Channel Realisations at each RMS Delay Spread
Francois Chin, Institute for Infocomm Research (I2R)

8. Multipath Realisations
Nov 2004
Multipath Realisations
1000 Channel Realisations at each RMS Delay Spread
Francois Chin, Institute for Infocomm Research (I2R)

9. Proposed Symbol-to-Chip Mapping (8-chip Code Set C8)
Nov 2004
Proposed Symbol-to-Chip Mapping (8-chip Code Set C8)
Decimal Value
Binary Symbol
Chip Value
0000
(Root – 5C) 1
1000 2
0100 3
1100 4
0010 5
1010 6
0110 7
1110 8
0001 9
1001 10
0101 11
1101 12
0011 13
1011 14
0111 15
1111
The sequences are related to each other through cyclic shifts and/or conjugation (i.e., inversion of odd-indexed chip values)
Francois Chin, Institute for Infocomm Research (I2R)

10. Other Root Sequences (8-chip C8 for Coherent Despreading only)
Nov 2004
Other Root Sequences (8-chip C8 for Coherent Despreading only)
The following Root Sequences are found through exhaustive search with identical low cross correlation and autocorrelation, in base 10:
Francois Chin, Institute for Infocomm Research (I2R)

11. DSSS Sequence E16 Nov 2004 Source doc.: IEEE 802.15-04-0314-02-004b
Decimal Symbol
Binary Symbol
Chip Values 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Source doc.: IEEE b
Francois Chin, Institute for Infocomm Research (I2R)

12. PSSS Sequence F31 (15 bit/32 chip)
Nov 2004
PSSS Sequence F31 (15 bit/32 chip)
Source doc.: IEEE b
Francois Chin, Institute for Infocomm Research (I2R)

13. Proposed Symbol-to-Chip Mapping (16-chip Code Set G16)
Nov 2004
Proposed Symbol-to-Chip Mapping (16-chip Code Set G16)
Decimal Value
Binary Symbol
Chip Value
0000
(Root - 2F53) 1
1000 2
0100 3
1100 4
0010 5
1010 6
0110 7
1110 8
0001 9
1001 10
0101 11
1101 12
0011 13
1011 14
0111 15
1111
The sequences are related to each other through cyclic shifts and/or conjugation (i.e., inversion of odd-indexed chip values)
Francois Chin, Institute for Infocomm Research (I2R)

14. Other Root Sequences (8-chip G16 for Coherent Despreading only)
Nov 2004
Other Root Sequences (8-chip G16 for Coherent Despreading only)
The following Root Sequences are found through exhaustive search with identical low cross correlation and autocorrelation, in base 10:
Francois Chin, Institute for Infocomm Research (I2R)

15. Multipath Performance (COBI 16-chip)
Nov 2004
For 16-chip COBI Sequence, No cyclic chip is needed when 3 RAKE is used.
Francois Chin, Institute for Infocomm Research (I2R)

16. Multipath Performance (COBI 8-chip)
Nov 2004
For 8-chip COBI Sequence, 1 Chip Extension is needed even with 3-RAKE, due to weaker despreading strength (shorter code length).
Francois Chin, Institute for Infocomm Research (I2R)

17. Multipath Performance (DSSS)
Nov 2004
For DSSS, No cyclic chip is needed when 3 RAKE is used.
Francois Chin, Institute for Infocomm Research (I2R)

18. Multipath Performance (PSSS)
Nov 2004
For PSSS, best performance with 2 RAKE fingers + 1 chip extension. Precoding (according to b) & 3rd RAKE do not seem to help.
Francois Chin, Institute for Infocomm Research (I2R)

19. What happened to PSSS? Nov 2004
Neighbouring parallel sequence is using M-Seq with 2 cyclic shifts in PSSS parallel sequence construction
Source doc.: IEEE b
While other schemes enjoy better multipath performance with more RAKE fingers, PSSS can only use up to 2 fingers as the 3rd RAKE is dominated by adjacent parallel bit sequence. PSSS is inter-parallel sequence interference limited
Francois Chin, Institute for Infocomm Research (I2R)

20. Nov 2004
915 MHz Coherent Receiver Performance Under Various Channel Delay Spread
Even upto 1.33us RMS Delay Spread
1 chip extension is NOT necessary for 16-chip sequence (COBI-16 & DSSS) if sufficient RAKE fingers (at least 3) are used, even in dense multipath environment
General performance comparison:
COBI sequence (16 chip) > DSSS Sequence (16 chip)
Francois Chin, Institute for Infocomm Research (I2R)

21. Nov 2004
868 MHz Coherent Receiver Performance Under Various Channel Delay Spread
Even upto 1.33us RMS Delay Spread
1 chip extension is NOT necessary for COBI-8 if sufficient RAKE fingers (at least 3) are used, even in dense multipath environment
General performance comparison:
COBI sequence (8 chip) > PSSS Sequence
Francois Chin, Institute for Infocomm Research (I2R)

22. Summary of Comparsion Nov 2004 Note : Red - desirable Code Set E16 C8
G16 C8
F31
Candidate for
915MHz
868MHz
Description
Orthogonal 16-DSSS
16-chip for Coh. Chip Despreading
8-chip for Coh. Chip Despreading
PSSS
Proposer
Helicomm
I2R
Dr. Wolf & Assoc.
Doc #
04-314
04-507
04-121
Sym-Chip mapping
Orthogonal
Cyclic & Odd Bit Inversion
Multi-code
Bit/sym 4 15
Chip/Sym 16 8
31+1 cyclic extension
Bit/chip
0.25
0.50
~0.47
Multipath performance
Good
Best
Better
Memory requirement
High
16 sequence
Low
Single sequence
RF linearity requirement
Moderate ~ high
Note : Red - desirable
Francois Chin, Institute for Infocomm Research (I2R)

23. Can Non-Coherent Detection be used?
Nov 2004
Can Non-Coherent Detection be used?
The COBI are designed to give best performance with coherent detection receiver. Can receiver employs Differential Chip detection?:
Yes, COBI sequence (16 chip) can handle multipath channels with RMS delay spread upto 0.15us for 915MHz bands using 1Mcps, which normally corresponds to short range indoor environment
Yes, COBI sequence (8 chip) can handle multipath channels with RMS delay spread upto 0.1us for 868MHz band using 300kcps, at even shorter range indoor
Francois Chin, Institute for Infocomm Research (I2R)

24. Multipath Performance Summary (Coherent Chip Despreading)
Nov 2004
Multipath Performance Summary (Coherent Chip Despreading)
To combat inter-chip interference due to realistic channel delay spread with RMS delay spread upto 1.33us (e.g. industry application space):
COBI 16-chip is recommended for 915MHz bands;
COBI 8-chip is recommended for 868MHz bands.
RAKE combining (with at least 3 fingers) is necessary in receiver to combine path diversity; (this does not affect standard)
Chip extension is NOT necessary to avoid inter-symbol interference, if sufficient RAKE fingers are employed
Differential chip despreading can also be used in shorter transmission range environment,e.g. residential space, where multipath channel RMS delay spread is upto 0.15us
Francois Chin, Institute for Infocomm Research (I2R)

25. 915 MHz Band Transmit PSD (COBI-16)
Nov 2004
915 MHz Band Transmit PSD (COBI-16)
Beyond fc +/- 1.2 MHz, the highest sidelobe level is ~39 dB below the total transmit power and ~30 dB below the highest point in the PSD
Therefore, ~10 dB of margin to the -20 dBr spec.
For a device transmitting +10 dBm, there is ~9 dB of margin to the -20 dBm absolute spec.
Propose to be same as existing 915MHz Mask
Francois Chin, Institute for Infocomm Research (I2R)

26. Supporting Materials Nov 2004
Francois Chin, Institute for Infocomm Research (I2R)

27. Coherent Receiver Multipath Performance
Nov 2004
Coherent Receiver Multipath Performance
What leads to Multipath robustness?
Frequency selectivity leads to Inter-chip interference, and that is the killer….
To overcome, code must have good autocorrelation properties, i.e. low sidelodes
Francois Chin, Institute for Infocomm Research (I2R)

28. How these codes achieve Multipath robustness?
Nov 2004
How these codes achieve Multipath robustness?
COBI, maintain constant module, can at best achieve zero auto-correlation within 2 chips from cor. Peak; that is good enough to handle ICI of upto 2 chip periods
DSSS, comprising Walsh sequences, is not designed with auto-correlation sidelodes in mind
PSSS, uses flexibility in amplitude to achieve low (zero?) auto-correlation throughout for each parallel sequence. However, it is inter-parallel sequence interference limited
COBI 8-chip autocorrelation matrix
COBI 16-chip autocorrelation matrix
Francois Chin, Institute for Infocomm Research (I2R)