GCSE OCR 1 The CPU Computer Science J276 Unit 1 System architecture, memory and storage 1

Objectives Understand the purpose of the CPU Explain the role and operation of the following CPU registers used in Von Neumann architecture: MAR (Memory Address Register), MDR (Memory Data Register), Program Counter, Accumulator

What is this?

The CPU

Central Processing Unit (CPU) The Central Processing Unit or CPU is arguably the most important component of a computer What does it do? If it was one organ in the human body what would it be?

Central Processing Unit (CPU) You can think of the CPU as being like the brain in a human It is responsible for all of a computer’s processing

The main components of a computer MAIN MEMORY SECONDARY STORAGE CENTRAL PROCESSING UNIT (CPU) INPUT DEVICES OUTPUT

Stored program concept Before about 1943, early computers stored the data to be worked on in memory The program was not stored – instructions were input one at a time using switches, or read in from paper tape and executed one at a time In 1943-44, mathematician von Neumann and his colleagues had the idea of storing the program instructions as well as the data in the same store The stored-program computer was born!

Von Neumann architecture Computer programs and the data the programs are using are stored in the same memory Data then moves between the memory unit and the processor 1 Program 2 3 4 5 Data 6 7 8

General Purpose Registers Registers in the CPU Program Counter Control Unit ALU General Purpose Registers

General Purpose Registers Registers in the CPU Program Counter: A special purpose register that holds the address of the next instruction to be executed General Purpose Registers: Hold data, such as numbers during arithmetic calculations Some architectures have just a single register called the Accumulator Program Counter General Purpose Registers

Program Counter 1 2 3 4 5 LDA 28 6 ADD #2 7 STO 10 8 9 10 11 12 The Program Counter points to the next instruction that needs to be executed It is located in the Control Unit The Program Counter is incremented after fetching an instruction This moves it on to point to the next instruction to be executed Program Counter 5

Accumulator The accumulator is where arithmetic and logic results are temporarily stored much like the M+ function on a calculator Without the accumulator, it would be necessary to write the result of each calculation to main memory The accumulator speeds up the storage and retrieval of calculations

The Arithmetic Logic Unit The ALU or Arithmetic Logic Unit performs: Logical operations, shift operations and arithmetic operations Accumulator 8 ALU Main Memory X = 3 Y = 5 ADD X, Y

MAR (Memory Address Register) MDR (Memory Data Register) Memory registers With the von Neumann architecture, both the instructions and the data are stored together in RAM Two registers are required to implement this: MAR (Memory Address Register) MDR (Memory Data Register)

MAR (Memory Address Register) The MAR holds the address of the current instruction being executed The MAR knows the location of the data that needs to be accessed It keeps track of where data is located MAR (Memory Address Register)

MDR (Memory Data Register) The MDR holds the actual data that is being stored in RAM It acts as a buffer and holds data that is copied from RAM, ready for the CPU to process it MDR (Memory Data Register)

MAR (Memory Address Register) MDR (Memory Data Register) Working together MAR (Memory Address Register) MDR (Memory Data Register) The two work together; The MAR knows where to look for data in RAM, the MDR keeps hold of that data until it’s ready to be used by the CPU Memory MAR (Memory Address Register) MDR (Memory Data Register)

Control Unit The control unit coordinates all of the activities taking place within the CPU Much like the conductor of an orchestra

Processor registers ALU: Temporarily stores arithmetic and logic results PC: Points to the next instruction MDR: Stores the actual data CIR (Current Instruction Register): Holds the current instruction to be executed MAR: Stores the address of the data

Fetch – Decode – Execute The CPU operates by repeating three operations: FETCH – causes the next instruction and any data involved to be fetched from main memory DECODE – decodes the instruction EXECUTE – carries out the instruction Repeat…

Example – Step 1 (Add 8 + 4) PC points to next instruction in location 5 Instruction is passed to the CIR and PC is incremented Memory location 10 is passed to the MAR The value in location 10 is passed from main memory to the MDR 8 is loaded into the accumulator 1 2 3 4 5 LDA 10 6 ADD #4 7 STO 11 8 9 10 11 12 Program Counter 5

Example – Step 2 6 PC now points to next instruction in location 6 Instruction is passed to the CIR and the PC is incremented 4 is added to 8 in the ALU and the result is stored in the accumulator 1 2 3 4 5 LDA 10 6 ADD #4 7 STO 11 8 9 10 11 12 Program Counter 6

Example – Step 3 7 PC points to the next instruction in location 7 Instruction is passed to the CIR Memory location 11 is passed to the MAR Total value 12 transferred from the accumulator into memory location 11 1 2 3 4 5 LDA 10 6 ADD #4 7 STO 11 8 9 10 11 12 Program Counter 7

Worksheet Complete Tasks 1-3 on the worksheet