José A. Joao* Onur Mutlu‡ Yale N. Patt*

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Presentation transcript:

Flexible Reference-Counting-Based Hardware Acceleration for Garbage Collection José A. Joao* Onur Mutlu‡ Yale N. Patt* * HPS Research Group University of Texas at Austin ‡ Computer Architecture Laboratory Carnegie Mellon University

Motivation: Garbage Collection Garbage Collection (GC) is a key feature of Managed Languages Automatically frees memory blocks that are not used anymore Eliminates bugs and improves security GC identifies dead (unreachable) objects, and makes their blocks available to the memory allocator Significant overheads Processor cycles Cache pollution Pauses/delays on the application 2

Software Garbage Collectors Tracing collectors Recursively follow every pointer starting with global, stack and register variables, scanning each object for pointers Explicit collections that visit all live objects Reference counting Tracks the number of references to each object Immediate reclamation Expensive and cannot collect cyclic data structures State-of-the-art: generational collectors Young objects are more likely to die than old objects Generations: nursery (new) and mature (older) regions 3

Overhead of Garbage Collection 4

Hardware Garbage Collectors Hardware GC in general-purpose processors? Ties one GC algorithm into the ISA and the microarchitecture High cost due to major changes to processor and/or memory system Miss opportunities at the software level, e.g. locality improvement Rigid trade-off: reduced flexibility for higher performance on specific applications Transistors are available Build accelerators for commonly used functionality How much hardware and how much software for GC? 5

Our Goal Architectural and hardware acceleration support for GC Reduce the overhead of software GC Keep the flexibility of software GC Work with any existing software GC algorithm 6

Basic Idea Simple but incomplete hardware garbage collection until the heap is full Software GC runs and collects the remaining dead objects Overhead of GC is reduced 7

Hardware-assisted Automatic Memory Management (HAMM) Hardware-software cooperative acceleration for GC Reference count tracking To find dead objects without software GC Memory block reuse handling To provide available blocks to the software allocator Reduce frequency and overhead of software GC Key characteristics Software memory allocator is in control Software GC still runs and makes high-level decisions HAMM can simplify: does not have to track all objects 8

ISA Extensions for HAMM Memory allocation REALLOCMEM, ALLOCMEM Pointer tracking (store pointer) MOVPTR, MOVPTROVR PUSHPTR, POPPTR, POPPTROVR Garbage collection 9

Coalescing Buffer (RCCB) Overview of HAMM … L1 RCCB Core 1 Core N LD/ST Unit RC updates Block address L1 Reference Count Coalescing Buffer (RCCB) L1 ABT L2 ABT L2 RCCB Core 0 CPU Chip 0 CPU Chip 1 RC Reusable blocks … RC RC CPU Chip M Available Block Table (ABT) Live objects Main memory 10

Modified Allocator addr ← REALLOCMEM size if (addr == 0) then // ABT does not have a free block → regular software allocator addr ← bump_pointer bump_pointer ← bump_pointer + size … else // use address provided by ABT end if // Initialize block starting at addr ALLOCMEM object_addr, size 11

Example of HAMM L1 Reference Count Coalescing Buffer (RCCB) eviction LD/ST Unit RC updates A: -1 A: 2 A: 2 A: 1 A: -1 A: 3 Block address prefetch incRC A decRC A decRC A decRC A incRC A incRC A A A A: 1 A: -1 MOV addr1, 0x50 REALLOCMEM R2, size MOV addr2, 0x020 PUSHPTR A ALLOCMEM A, size MOVPTR R3, A MOV R3, 0x50 L1 ABT L2 ABT L2 RCCB Core prefetch eviction eviction CPU Chip RC Reusable blocks RC A dead A 1 Available Block Table (ABT) Main memory 12

ISA Extensions for HAMM Memory allocation REALLOCMEM, ALLOCMEM Pointer tracking (store pointer) MOVPTR, MOVPTROVR PUSHPTR, POPPTR, POPPTROVR Garbage collection FLUSHRC 13

Methodology Benchmarks: DaCapo suite on Jikes Research Virtual Machine with its best GC, GenMS Simics + cycle-accurate x86 simulator 64 KB, 2-way, 2-cycle I-cache 16 KB perceptron predictor Minimum 20-cycle branch misprediction penalty 4-wide, 128-entry instruction window 64 KB, 4-way, 2-cycle, 64B-line, L1 D-cache 4 MB, 8-way, 16-cycle, 64B-line, unified L2 cache 150-cycle minimum memory latency Different methodologies for two components: GC time estimated based on actual garbage collection work over the whole benchmark Application: cycle-accurate simulation with microarchitectural modifications on 200M-instruction slices 14

GC Time Reduction 15

Application Performance Since GC time is reduced by 29%, HAMM is a win 16

Why does HAMM work? HAMM reduces GC time because Eliminates collections: 52%/50% of nursery/full-heap Enables memory block reuse for 69% of all new objects in nursery and 38% of allocations into older generation Reduces GC work: 21%/49% for nursery/full-heap HAMM does not slow down the application significantly Maximum L1 cache miss increase: 4% Maximum L2 cache miss increase: 3.5% HAMM itself is responsible for only 1.4% of all L2 misses 17

Conclusion Garbage collection is very useful, but it is also a significant source of overhead Improvements on pure software GC or hardware GC are limited We propose HAMM, a cooperative hardware-software technique Simplified hardware-assisted reference counting and block reuse Reduces GC time by 29% Does not significantly affect application performance Reasonable cost (67KB on a 4-core chip) for an architectural accelerator of an important functionality HAMM can be an enabler encouraging developers to use managed languages 18

Thank You! Questions?