HALT: Notebook Computer Case Study

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Presentation transcript:

HALT: Notebook Computer Case Study Nate Drees Dell Inc. Nathan_drees@dell.com

Objective Introduce HALT methodology Provide information on specific implementation of HALT (notebook computers) Illustrate examples of HALT-unique failures

What is HALT? Highly Accelerated Life Test Key concept is combined stresses Rapid Thermal Cycling and Vibration at a minimum Can also include voltage, frequency, etc. Margin test / Test to Failure Goal is to quickly highlight design weaknesses on a small sample size. Stresses often exceed expected field use or even specification

HALT Equipment Special Chamber Required Capable of Rapid Thermal Transition Rate in excess of 45°C/min Requires close access to LN2 Capable of Random Vibration 6 degrees-of-freedom (not just z-axis) quasi-random vibration Frequency range from ~2Hz to 10kHz Vibration usually provided by circular arrangement of pneumatic hammers

HALT Procedure Setup Thermal Step-Stress Rapid Thermal Cycling Vibration Step-Stress Combined Stress Cycles

HALT Setup Use external peripherals (mouse, KB, etc.) to monitor unit as testing is operational. Mount an accelerometer on a flat PCB surface near the CPU. Mount a thermocouple to the PCB, usually on an IC. Use proper fixturing to mount the test unit to the chamber floor. Fixture Thermocouple Accelerometer Power switch

Thermal Step Stress

Rapid Thermal Cycling Following Thermal Step Stress, some HALT methodologies call for 3 rapid thermal cycles. Can help distinguish thermal cycling failures from thermal/vibration failures Omitted at Dell, due to experience with standalone thermal shock chamber.

Vibration Step Stress

Combined Cycles

HALT Failure Case Studies Next 3 slides contain actual HALT failures All case study failures were detected during the development cycle These were determined to be legitimate failures, based on historical data HALT is the only test that detected these failures These issues were corrected and regressed prior to releasing the product

HALT Failure #1 Failure Occurred during combined cycles at system level Connecting tabs in battery pack fractured This failure sparked interest in performing HALT at battery pack level

HALT Failure #2 Failure occurred during vibration step stress at system level. Historical data shows hinge was never weak link. Increased radius solved the issue. Hinge has fractured at the thinnest cross sectional area between base and display attachment.

HALT Failure #3 Initial sample of LF motherboard produced numerous solder joint cracks in vibration step stress Failures occurred at levels much lower than eutectic HALT is therefore an integral part of LF qualification

References Hobbs, Gregg K.: HALT and HASS, The New Quality and Reliability Paradigm: http://www.hobbsengr.com/papers/H%26HParadigm.pdf GM Worldwide Engineering Standards GMW8287: Highly Accelerated Life Testing. February 2002.

Thank you © 2005