ESE535: Electronic Design Automation

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Presentation transcript:

ESE535: Electronic Design Automation Day 2: January 14, 2013 Covering Work preclass exercise Penn ESE535 Spring2013 -- DeHon

Today: Covering Problem Behavioral (C, MATLAB, …) RTL Gate Netlist Layout Masks Arch. Select Schedule FSM assign Two-level, Multilevel opt. Covering Retiming Placement Routing Today: Covering Problem Implement a “gate-level” netlist in terms of some library of primitives General Formulation Make it easy to change technology Make it easy to experiment with library requirements Evaluate benefits of new cells… Evaluate architecture with different primitives Penn ESE535 Spring2013 -- DeHon

Input netlist (logical circuit) library represent both in normal form: nand gate inverters Penn ESE535 Spring2013 -- DeHon

Elements of a library - 1 Example: Keutzer Element/Area Cost Tree Representation (normal form) INVERTER 2 NAND2 3 NAND3 4 NAND4 5 Example: Keutzer Penn ESE535 Spring2013 -- DeHon

Elements of a library - 2 Tree Representation (normal form) Element/Area Cost AOI21 4 AOI22 5 Penn ESE535 Spring2013 -- DeHon

Input Circuit Netlist ``subject DAG’’ Each wire is a network (net). Each net has a single source (the gate that drives it). In general, net may have multiple sinks (gates that take as input) Penn ESE535 Spring2013 -- DeHon

Input Circuit Netlist ``subject DAG’’ 5 3 2 1 4 6 4 6 A list of the nets (netlist) fully describes the circuit 0 nand 1 6 1 inv 2 2 nand 3 4 Penn ESE535 Spring2013 -- DeHon

Problem Statement Find an ``optimal’’ (in area, delay, power) mapping of this circuit (DAG) into this library Penn ESE535 Spring2013 -- DeHon

Why covering now? Nice/simple cost model Problem can be solved well somewhat clever solution General/powerful technique Show off special cases harder/easier cases Show off things that make hard Show off bounding Penn ESE535 Spring2013 -- DeHon

What’s the problem? Trivial Covering subject DAG 7 NAND2 (3) = 21 5 INV (2) = 10 Area cost 31 Penn ESE535 Spring2013 -- DeHon

Preclass 1 Direct covering cost? 2 3 4 6 Penn ESE535 Spring2013 -- DeHon

Preclass 3 & 4 Least Area Cover? (associated area?) How did you get? 2 6 Penn ESE535 Spring2013 -- DeHon

Cost Models Penn ESE535 Spring2013 -- DeHon

Cost Model: Area Assume: Area in gates or, at least, can pick an area/gate so proportional to gates e.g. Standard Cell design Standard Cell/route over cell Gate array Penn ESE535 Spring2013 -- DeHon

Standard Cells Lay out gates so that heights match Rows of adjacent cells Standardized sizes Motivation: ease place and route 15 Penn ESE535 Spring2013 -- DeHon 15

Standard Cell Area inv nand3 inv AOI4 nor3 Inv All cells uniform height Width of channel determined by routing Cell area Width of channel fairly constant? Penn ESE535 Spring2013 -- DeHon

Standard Cell Area inv nand3 All cells uniform height Width of channel determined by routing Cell area Penn ESE535 Spring2013 -- DeHon

Cost Model: Delay Delay in gates at least assignable to gates Twire << Tgate Twire ~=constant delay exclusively/predominantly in gates Gates have Cout, Cin lump capacitance for output drive delay ~ Tgate + fanoutCin Cwire << Cin or Cwire can lump with Cout/Tgate Penn ESE535 Spring2013 -- DeHon

Logic Delay How would we calculate delay? Penn ESE535 Spring2013 -- DeHon

Parasitic Capacitances Penn ESE535 Spring2013 -- DeHon

Delay of Net Penn ESE535 Spring2013 -- DeHon

Cost Model: Delay Delay in gates F=22nm CMOS Tgate(inv drive 4 inv)~=1ps Twire(300mm)~=1ps Wgate~=0.3mm Delay in gates at least assignable to gates Twire << Tgate Twire ~=constant delay exclusively/predominantly in gates Gates have Cout, Cin lump capacitance for output drive delay ~ Tgate + fanoutCin Cwire << Cin or Cwire can lump with Cout/Tgate Penn ESE535 Spring2013 -- DeHon

Cost Models Why do I show you models? not clear there’s one “right” model changes over time you’re going to encounter many different kinds of problems want you to see formulations so can critique and develop own simple cost models make problems tractable are surprisingly adequate simple, at least, help bound solutions may be wrong today…need to rethink Penn ESE535 Spring2013 -- DeHon

Approaches Penn ESE535 Spring2013 -- DeHon

Greedy work? Greedy = pick next locally “best” choice 2 3 4 6 Penn ESE535 Spring2013 -- DeHon

Greedy InOut 6 4 2 Penn ESE535 Spring2013 -- DeHon

Greedy InOut 8 11 Penn ESE535 Spring2013 -- DeHon

Greedy OutIn 4 6 2 Penn ESE535 Spring2013 -- DeHon

Greedy OutIn 8 11 Penn ESE535 Spring2013 -- DeHon

But… 4 2 4 = 10 Penn ESE535 Spring2013 -- DeHon

Greedy Problem What happens in the future (elsewhere in circuit) will determine what should be done at this point in the circuit. Can’t just pick best thing for now and be done. Penn ESE535 Spring2013 -- DeHon

Brute force? Pick a node (output) Consider all possible gates which may cover that node branch on all inputs after cover pick least cost node Penn ESE535 Spring2013 -- DeHon

Pick a Node Penn ESE535 Spring2013 -- DeHon

Brute force? Pick a node (output) Consider Explore all possible covers all possible gates which may cover that node recurse on all inputs after cover pick least cost node Explore all possible covers can find optimum Penn ESE535 Spring2013 -- DeHon

Analyze brute force? Time? Say P patterns, constant time to match each (if patterns long could be > O(1)) P-way branch at each node… How big is tree? …exponential O((P)depth) Penn ESE535 Spring2013 -- DeHon

Structure inherent in problem to exploit? What structure exists? Penn ESE535 Spring2013 -- DeHon

Structure inherent in problem to exploit? There are only N unique nodes to cover! Penn ESE535 Spring2013 -- DeHon

Structure If subtree solutions do not depend on what happens outside of its subtree separate tree farther up tree Should only have to look at N nodes. Time(N) = N*P*T(match) w/ P fixed/bounded  linear in N w/ cleverness work isn’t P*T(match) at every node Penn ESE535 Spring2013 -- DeHon

Idea Re-iterated Work from inputs Optimal solution to subproblem is contained in optimal, global solution Find optimal cover for each node Optimal cover: examine all gates at this node look at cost of gate and its inputs pick least Penn ESE535 Spring2013 -- DeHon

Work front-to-back Penn ESE535 Spring2013 -- DeHon

Work Example (area) 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 2 2 3 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 2 2 3 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3+3+2=8 3 2 2 3 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 2 2 3 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 2 2 3 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 2 2 3+2=5 3 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 2 2 3 5 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 2 2 3+5=8 3 5 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 8+2+3=13 3 8 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 13 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 13+2=15 3 8 13 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 3+2+4=9 8 13 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 13 9 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 9+4+3=16 8 13 9 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8+2+4+4=18 8 13 9 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 13 9 16 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 16+2=18 8 13 9 16 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 13+5+4=22 13 9 16 2 2 3 5 4 2 3 4 5 4 5 library 2 3 4 5 4 5 Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 13 9 16 18 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 18+3=21 13 9 16 18 2 2 3 5 4 library 2 3 4 5 4 5 Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 9+4+4=17 13 9 16 18 2 2 3 5 4 2 3 4 5 4 5 library 2 3 4 5 4 5 Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8+2+4+5=19 8 13 9 16 18 2 2 3 5 4 2 3 4 5 4 5 library 2 3 4 5 4 5 Penn ESE535 Spring2013 -- DeHon

Work Example (area) 3 8 13 9 16 18 17 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Optimal Cover 3 8 13 9 16 18 17 2 2 3 5 4 library 2 3 4 5 4 5 Penn ESE535 Spring2013 -- DeHon

Optimal Cover 3 8 13 9 16 18 17 2 2 3 5 4 Much better than 31! 2 3 4 5 library 2 3 4 5 4 5 Penn ESE535 Spring2013 -- DeHon

Note There are nodes we cover that will not appear in final solution. Penn ESE535 Spring2013 -- DeHon

“Unused” Nodes 3 8 9 13 16 18 17 2 2 3 5 4 2 3 4 5 4 5 library Penn ESE535 Spring2013 -- DeHon

Dynamic Programming Solution Solution described is general instance of dynamic programming Require: optimal solution to subproblems is optimal solution to whole problem (all optimal solutions equally good) divide-and-conquer gets same (finite/small) number of subproblems Same technique used for instruction selection in code generation for processors Penn ESE535 Spring2013 -- DeHon

Delay Similar Delay(node) = Delay(gate)+Max(Delay(input)) Penn ESE535 Spring2013 -- DeHon

DAG DAG = Directed Acyclic Graph Distinguish from tree (tree  DAG) Distinguish from cyclic Graph DAG  Directed Graph (digraph) tree DAG Digraph Penn ESE535 Spring2013 -- DeHon

Trees vs. DAGs Optimal for trees why? Delay Area Penn ESE535 Spring2013 -- DeHon

Not optimal for DAGs Why? Penn ESE535 Spring2013 -- DeHon

Not optimal for DAGs Why? 1+1+1=3 1+1+1=3 Penn ESE535 Spring2013 -- DeHon

Not optimal for DAGs Why? 3+3+1=7 ? 1+1+1=3 1+1+1=3 Penn ESE535 Spring2013 -- DeHon

Not Optimal for DAGs (area) Cost(N) = Cost(gate) +  Cost(input nodes) think of sets cost is magnitude of set union Problem: minimum cost (magnitude) solution isn’t necessarily the best pick get interaction between subproblems subproblem optimum not global... Penn ESE535 Spring2013 -- DeHon

DAG Example Cover with 3 input gates Penn ESE535 Spring2013 -- DeHon

DAG Example Cover with 3 input gates Penn ESE535 Spring2013 -- DeHon

Not Optimal for DAGs Delay: in fanout model, depends on problem you haven’t already solved (delay of node depends on number of uses) Penn ESE535 Spring2013 -- DeHon

What do people do? Cut DAGs at fanout nodes optimally solve resulting trees Area guarantees covered once get accurate costs in covering trees, made “premature” assignment of nodes to trees Delay know where fanout is Penn ESE535 Spring2013 -- DeHon

Bounding Tree solution give bounds (esp. for delay) single path, optimal covering for delay (also make tree by replicating nodes at fanout points) no fanout cost give bounds know you can’t do better delay bounds useful, too know what you’re giving up for area when delay matters Penn ESE535 Spring2013 -- DeHon

(Multiple Objectives?) Like to say, get delay, then area won’t get minimum area for that delay algorithm only keep best delay …but best delay on off critical path piece not matter …could have accepted more delay there don’t know if on critical path while building subtree (iterate, keep multiple solutions) Penn ESE535 Spring2013 -- DeHon

Many more details... Implement well Combine criteria …but now you know the main idea Penn ESE535 Spring2013 -- DeHon

Big Ideas simple cost models problem formulation identifying structure in the problem special structure characteristics that make problems hard bounding solutions Penn ESE535 Spring2013 -- DeHon

Admin Reading for today: blackboard Reading for Wednesday: online/Xplorer Office Hour: T4:30pm Or make an appointment Project: 7 only know C; 4 only know Java 7 know C and Java Penn ESE535 Spring2013 -- DeHon