8085 MICROPROCESSOR 8085 CPU Registers and Status Flags S Z AC P C A B Sign Zero Auxiliary Carry Parity Carry Program Status Word (PSW) Accumulator Secondary Data Counters Primary Data Counter Stack Pointer Program Counter S Z AC P C A B C D E H L SP PC Secondary Accumulators Instruction Register I

8085 Instruction Fetching Memory S Z AC P C A B, C D, E H, L SP PC I PSW mmmm+2 mmmm mmmm+1 Memory Address where the instruction is stored ii ii Instruction Code mmmm INSTRUCTION DECODER Here the instruction code ii is decoded and proper control signals are sent to the CPU, memory, and I/O registers

8085 Memory Addressing IMPLIED MEMORY ADDRESSING A C E L B D H Memory The 8-bit contents of the selected memory location are moving, as specified by the instruction, to one of the following registers: A, B, C, D, E, H or L. A C E L B D H Memory The 16-bit contents of the registers H and L represent the address of this memory location Primary Data Counter

DIRECT MEMORY ADDRESSING L B D H Memory The 8-bit contents of the selected memory location are moving, as specified by the instruction, to the accumulator A. The 16-bit contents pp qq of the last two bytes of the instruction represent the address of this memory location xx pp qq Three byte instruction