Chapter 10 Figure 07

Chapter 10 Figure 07

CF/CI has two components Before switch is turned off After switch is turned off Before: switch is still on, CF/CI charge will flow through switch to a low impedance point (V-source, op-amp output, etc) After: CF/CI charge has no place to go, converts into an error on VC For the case of Q3, this is a fixed error, but for Q1, the error is not constant

CF and CI amount depends on value of V’ which is ~= Vin Chapter 10 Figure 07 CF and CI amount depends on value of V’ which is ~= Vin So, signal dependent, nonlinear

Chapter 10 Figure 10

Using dummy switch to cancel CF/CI phi phi’ vin When switch is still on, CF/CI not a big problem. After switch begins to turn off, phi goes down and phi’ goes up together; so that CF/CI from dummy cancels CF/CI from main switch. Difficulties: size ratio needs to be right phi down and phi’ up timing needs to be right

Input Noise on the Comparator Problem: Solution: Introduce Hysteresis

External Positive Feedback Homework Derive the expressions for the two threshold voltages

Internal Positive Feedback

Latched comparators Pre-amplification followed by a track-and-latch. Pre-amplification is used to obtain high resolution and to minimize “kickback” effects. Kickback: charge transfer in or out of the input side when the track-and-latch goes from track mode to latch mode. Pre-amplification has moderate gains, or small gains for higher speed Output of pre-amp is too small to drive digital. It is amplified during track-and-latch modes by positive feedback which regenerates the analog signal into a full-scalar digital signal.

The inputs are initially applied to the outputs of the latch. Vo1’ = initial input applied to vo1 Vo2’ = initial input applied to vo2 Then positive feedback drives the higher of the two to digital 1 and the lower of the two to digital 0

CMOS Latch

There are several comparator circuit in the book, here is one from a paper by T.B. Cho and P.R. Gray, “A 10b, 20Msamples/s, 35mW pipeline A/D Converter,” IEEE J. Solid-State Circuits, vol. 30, no. 3, pp. 166-172, March 1995.

When phi_1 is low:

When phi_1 is high:

Chapter 10 Figure 20

Chapter 10 Figure 21