Designing Parallel Algorithms (Synchronization)

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Presentation transcript:

Designing Parallel Algorithms (Synchronization) Parallel Processing (CS526) Spring 2012(Week 6)

What we already know.. A parallel algorithm is a group of partitioned tasks that work with each other to solve a large problem. Working together communication and coordination. Communication/coordination Synchronization.

Synchronization There are two kinds of Synchronization: Mutual Exclusion : We want to prevent two or more threads from being active concurrently for some period, because their actions may interfere incorrectly. Condition Synchronization :occurs when we want to delay an action until some condition (on the shared variables such as in producer-consumer, or with respect to the progress of other threads such as in a barrier) becomes true.

Accessing a shared Data Assume, a shared counter x is initially 0; Two concurrent threads increment x; Expected result: x == 2 Process histories: • P1: …; load value of x to reg; incr reg; write reg to x; … • P2: …; load value of x to reg; incr reg; write reg to x; … Without synchronization, the final result can be x == {1,2} The statements accessing shared variables are critical sections that must be executed one at a time, i.e. with mutual exclusion (atomically)

Accessing a shared Data Mutual Exclusion : We want to prevent two or more threads from being active concurrently for some period, because their actions may interfere incorrectly.

The Critical Section Problem Critical section is a section of code that accesses a shared resource (e.g. a shared variable) and can be executed by only one process at a time. The Critical Section (CS) Problem: To find a mechanism that guarantees execution of critical sections one at a time, i.e. with mutual exclusion. Arises in many concurrent programs. For example: shared linked lists in OS, database records, shared counters, etc.

Solving The CS Problem The challenge is to make the critical section atomic. We must design code to execute before (entry protocol) and after (exit protocol) the critical section. Our Solution should have the following Important Properties: Mutual Exclusion. At most one thread is executing the critical section at a time. Absence of Deadlock (or Livelock). If two or more threads are trying to enter the critical section, at least one succeeds. Absence of Unnecessary Delay. If a thread is trying to enter its critical section and the other threads are executing their non- critical sections, or have terminated, the first thread is not prevented from entering its critical section. Eventual Entry (or No Starvation). A thread that is attempting to enter its critical section will eventually succeed.

Critical Sections & Locks The entry and exit protocol code obviously has to operate upon one or more shared variables. Conventionally we call such variables locks, and the protocol code sequences locking and unlocking. Shared variable libraries will often abstract these as functions.

Observations We can have, One lock for all shared variables inefficient, decreases parallelism Or, Each shared variable has its own lock large degree of parallelism can be achieved, but may cause very large synchronization overhead (memory and time) a tradeoff between the number of locks (synchronization overhead) for the number of variables protected by one lock (available parallelism).

Locking Mechanisms Unfair (spin) locks – unfair but efficient: Short latency and low memory demand Poor fairness, may cause starvation Good in case of low contention (a few processes) Examples: Test&set lock, test-test&set lock, test&set lock with backof. Fair (queuing) locks – fair but more expensive: Longer latency, more memory – the price for fairness Examples: tie-breaker lock, ticket lock, bakery loc

Critical Sections Using Spin Locks A spin Lock is a Boolean variable that indicates whether or not one of the processes is in its critical section: lock == 1 – some process is in its CS (the lock is “locked”) lock == 0 – no process in CS (the lock is “unlocked”)

Implementing Spin Locks A simple approach is to implement each lock with a shared boolean variable. If the variable has value false then one locking thread can set it and be allowed to proceed. Other attempted locks must be forced to wait. To unlock the lock, the lock-holding thread simply sets the lock to false. We can specify this behavior with < await () > pseudo notation.

Implementing a spin Locks Assuming it is atomic

Implementing a spin Locks The spin lock requires atomicity is its own implementation: <await (!location) location = true;> HW support for synchronization – a special atomic memory instruction <read-modify-write>, such as test&set, swap, compare&swap, fetch&increment. Unlock is implemented with ordinary store operation location = false; Test-and-set lock using Test&Set instruction (t&s):

Drawback of the Simple Test-and-Set Lock Causes high memory contention while waiting for the lock: T&s is treated as a write operation – invalidates cached copies if any Unsuccessful t&s generate memory accesses (bus traffic) Also wasting CPU time because of busy waiting Enhancements to the simple Test&Set lock: SW solutions: Test&set lock with (exponential) backoff Test-test&set lock Improved HW primitives: Instructions Load-Locked (LL) and Store-Conditional(SC)

Test&Set Lock with Backoff Test&set lock with exponential backoff: Back off (pause) after unsuccessful t&s (attempt to lock) Allows to reduce frequency of issuing test&sets while waiting. Don’t back off too much or will be backed off when lock becomes free

Test-Test&Set Lock Idea: Keep testing with ordinary load. When value changes(to 0), try test&set. Slightly higher latency, much less memory contention

Performance of Test-and-Set Locks Uncontained latency Low if repeatedly accessed by same processor; independent of n Traffic Lots if many processors compete; poor scaling with n Each t&s generates invalidations, and all rush out again to t&s Storage: Very small (single variable); independent of n Fairness: Poor, can cause starvation Test&set with backoff similar, but less traffic Test-and-test&set: slightly higher latency, much less traffic

Queuing Locks versus Spin Locks Spin locks are efficient (low latency and memory demand) When a lock becomes free, spinning processes rush to grab the lock in an arbitrary order; one succeeds, others fail and spin again. The same process can grab the lock again. Queuing locks provide fair solution to the CS problem Waiting processes are queued on the lock; Released lock is passed to the proc in the head of the queue; Examples : ticket, bakery algorithms.

The Ticket Algorithm Works like a waiting line at a post office or a bank. Two shared counters per lock: number to be “drawn” by one proc at a time; next to indicate which proc can enter its critical section. CS enter (lock the lock): Read a number from number and increment number; wait until next is equal to its number drawn, then enter CS. CS exit (unlock the lock): Increment next that allows the next waiting proc (if any) to enter its CS.

Critical Sections Using the Ticket Algorithm

Implementing the Ticket Lock The ticket lock can be implemented as a structure with fields number and next. turn[i] can be a local variable turn in the Lock procedure. The ticket lock needs a special atomic memory instruction for number drawing – fetch&increment (load a location to a register and incrementthe location).

The Bakery Algorithm The Ticket algorithm is fair if fetch&op is available. Otherwise requires mutual exclusion for number drawing that can be unfair. The Bakery algorithm works like a line in a bakery without a number-drawing machine – a proc looks around and takes a number one larger then any other. Requires a shared int array turn[n] per lock. Does not need a special instruction.

Implementation of The Bakery Algorithm