ECE574 – Lecture 3 Page 1 MA/JT 1/14/03 MOS structure MOS: Metal-oxide-semiconductor –Gate: metal (or polysilicon) –Oxide: silicon dioxide, grown on substrate.

Slides:



Advertisements
Similar presentations
6.1 Transistor Operation 6.2 The Junction FET
Advertisements

Electrical Engineering 2
6.4.3 Effect of real surfaces Departure from the ideal case is due to Work function difference between the doped polysilicon gate and substrate The inevitably.
The MOS Transistor Polysilicon Aluminum.
MOSFETs MOSFETs ECE 663.
Chapter 6 The Field Effect Transistor
Spring 2007EE130 Lecture 29, Slide 1 Lecture #29 ANNOUNCEMENTS Reminder: Quiz #4 on Wednesday 4/4 No Office Hour or Coffee Hour on Wednesday Tsu-Jae will.
Spring 2007EE130 Lecture 33, Slide 1 Lecture #33 OUTLINE The MOS Capacitor: C-V examples Impact of oxide charges Reading: Chapter 18.1, 18.2.
Lecture 11: MOS Transistor
Lecture 15 OUTLINE MOSFET structure & operation (qualitative)
Metal-Oxide-Semiconductor (MOS)
EE415 VLSI Design The Devices: MOS Transistor [Adapted from Rabaey’s Digital Integrated Circuits, ©2002, J. Rabaey et al.]
Lecture 10: PN Junction & MOS Capacitors
Spring 2007EE130 Lecture 30, Slide 1 Lecture #30 OUTLINE The MOS Capacitor Electrostatics Reading: Chapter 16.3.
Lecture 19 OUTLINE The MOSFET: Structure and operation
ECE 431 Digital Circuit Design Chapter 3 MOS Transistor (MOSFET) (slides 2: key Notes) Lecture given by Qiliang Li 1.
Basic Equations for Device Operation
Lecture 1b - Review Kishore C Acharya. 2 Building Semiconductor Devices To build semiconductor devices # of carriers present in the semiconductor must.
EXAMPLE 6.1 OBJECTIVE Fp = 0.288 V
Norhayati Soin 06 KEEE 4426 WEEK 3/2 13/01/2006 KEEE 4426 VLSI WEEK 3 CHAPTER 1 MOS Capacitors (PART 2) CHAPTER 1.
© 2012 Eric Pop, UIUCECE 340: Semiconductor Electronics ECE 340 Lecture 30 Metal-Semiconductor Contacts Real semiconductor devices and ICs always contain.
NMOS PMOS. K-Map of NAND gate CMOS Realization of NAND gate.
ELECTRONICS II VLSI DESIGN FALL 2013 LECTURE 4 INSTRUCTOR: L.M. HEAD, PhD ELECTRICAL & COMPUTER ENGINEERING ROWAN UNIVERSITY.
ECE 4339 L. Trombetta ECE 4339: Physical Principles of Solid State Devices Len Trombetta Summer 2007 Chapters 16-17: MOS Introduction and MOSFET Basics.
Norhayati Soin 06 KEEE 4426 WEEK 3/1 9/01/2006 KEEE 4426 VLSI WEEK 3 CHAPTER 1 MOS Capacitors (PART 1) CHAPTER 1.
Lecture 18 OUTLINE The MOS Capacitor (cont’d) – Effect of oxide charges – Poly-Si gate depletion effect – V T adjustment Reading: Pierret ; Hu.
ECE442: Digital ElectronicsCSUN, Spring-2010-Zahid MOS Transistor ECE442: Digital Electronics.
UNIT I MOS TRANSISTOR THEORY AND PROCESS TECHNOLOGY
Structure and Operation of MOS Transistor
Lecture 18 OUTLINE The MOS Capacitor (cont’d) – Effect of oxide charges – V T adjustment – Poly-Si gate depletion effect Reading: Pierret ; Hu.
EE 5340 Semiconductor Device Theory Lecture 24 – Spring 2011 Professor Ronald L. Carter
MOSFET Current Voltage Characteristics Consider the cross-sectional view of an n-channel MOSFET operating in linear mode (picture below) We assume the.
L19 26Mar021 Semiconductor Device Modeling and Characterization EE5342, Lecture 19 -Sp 2002 Professor Ronald L. Carter
Introduction to semiconductor technology. Outline –6 Junctions Metal-semiconductor junctions –6 Field effect transistors JFET and MOS transistors Ideal.
Integrated Circuit Devices
Metal-oxide-semiconductor field-effect transistors (MOSFETs) allow high density and low power dissipation. To reduce system cost and increase portability,
© S.N. Sabki CHAPTER 6: MOSFET & RELATED DEVICES CHAPTER 6: MOSFET & RELATED DEVICES.
MOS capacitor before joining The metallic gate may be replaced with a heavily doped p+ polysilicon gate. The Fermi energy levels are approximately at.
The MOS capacitor. (a) Physical structure of an n+-Si/SiO2/p-Si MOS capacitor, and (b) cross section (c) The energy band diagram under charge neutrality.
MOS CAPACITOR Department of Materials Science & Engineering
EE130/230A Discussion 10 Peng Zheng.
Damu, 2008EGE535 Fall 08, Lecture 21 EGE535 Low Power VLSI Design Lecture #2 MOSFET Basics.
CMOS VLSI Design 4th Ed. EEL 6167: VLSI Design Wujie Wen, Assistant Professor Department of ECE Lecture 3A: CMOs Transistor Theory Slides adapted from.
Introduction to MOS Transistors
MOS Transistor Theory The MOS transistor is a majority carrier device having the current in the conducting channel being controlled by the voltage applied.
CHAPTER 6: MOSFET & RELATED DEVICES CHAPTER 6: MOSFET & RELATED DEVICES Part 1.
The Devices: MOS Transistor
Chapter 6 The Field Effect Transistor
Lecture 18 OUTLINE The MOS Capacitor (cont’d) Effect of oxide charges
Lecture 15 OUTLINE The MOS Capacitor Energy band diagrams
Recall Last Lecture Common collector Voltage gain and Current gain
Revision CHAPTER 6.
Introduction to Metal-Oxide-Semiconductor Field Effect Transistors (MOSFETs) Chapter 7, Anderson and Anderson.
Lecture 17 OUTLINE The MOS Capacitor (cont’d) Small-signal capacitance
EMT362: Microelectronic Fabrication CMOS ISOLATION TECHNOLOGY Part 1
Lecture #30 OUTLINE The MOS Capacitor Electrostatics
Lecture 15 OUTLINE The MOS Capacitor Energy band diagrams
Lecture 17 OUTLINE The MOS Capacitor (cont’d) Small-signal capacitance
MOS Capacitor Basics Metal SiO2
FIELD EFFECT TRANSISTOR
Lecture 18 OUTLINE The MOS Capacitor (cont’d) Effect of oxide charges
Lecture 17 OUTLINE The MOS Capacitor (cont’d) Small-signal capacitance
Sung June Kim Chapter 16. MOS FUNDAMENTALS Sung June Kim
Lecture 15 OUTLINE The MOS Capacitor Energy band diagrams
Lecture 16 OUTLINE The MOS Capacitor (cont’d) Electrostatics
6.1 Transistor Operation 6.2 The Junction FET
Lecture 15 OUTLINE The MOS Capacitor Energy band diagrams
Lecture 16 OUTLINE The MOS Capacitor (cont’d) Electrostatics
Modern Semiconductor Devices for Integrated Circuits (C. Hu)
Sung June Kim Chapter 18. NONIDEAL MOS Sung June Kim
Presentation transcript:

ECE574 – Lecture 3 Page 1 MA/JT 1/14/03 MOS structure MOS: Metal-oxide-semiconductor –Gate: metal (or polysilicon) –Oxide: silicon dioxide, grown on substrate MOS capacitor: two-terminal MOS structure Si substrate Oxide (SiO 2 ) Metal gate (Al) Body or substrate terminal Gate terminal

ECE574 – Lecture 3 Page 2 MA/JT 1/14/03 MOS Energy Band Diagram: Ideal Modified work function (q  M, q  S ): energy required to take electron from Fermi level to conduction band of oxide Work functions for metal and Si are equal (ideal) qMqM ECEC EiEi E Fp EVEV qSqS E C,oxide E Fm oxide bandgap 8ev Oxide Metalp-type Si

ECE574 – Lecture 3 Page 3 MA/JT 1/14/03 MOS Energy Band Diagram: Ideal E Fp EVEV ECEC MOS (p-type) Both gate and substrate connected to 0V (gnd) Fermi levels must line up at equilibrium No band bending necessary No built-in field or depletion region formed EiEi E Fm qFqF  F = Fermi potential (difference between E F and E i in bulk) qMqM qSqS

ECE574 – Lecture 3 Page 4 MA/JT 1/14/03 MOS Energy Band Diagram: Real Work function difference between Al and Si –Depends on material used, doping, etc. At equilibrium, Fermi levels must line up qMqM ECEC EiEi E Fp EVEV qSqS E C,oxide E Fm oxide bandgap 8ev Oxide Metalp-type Si

ECE574 – Lecture 3 Page 5 MA/JT 1/14/03 MOS Energy Band Diagram E Fp EVEV ECEC MOS (p-type) Bands must bend for Fermi levels to line up Part of voltage drop occurs across oxide, rest occurs next to O-S interface Amount of bending is equal to work function difference: q  M - q  S EiEi E Fm qFqF qSqS  F = Fermi potential (difference between E F and E i in bulk)  S = surface potential

ECE574 – Lecture 3 Page 6 MA/JT 1/14/03 Flat-Band Voltage Flat-band voltage –Built-in potential of MOS system –Work function difference: V FB =  m -  S –Apply this voltage to “flatten” energy bands Example: –P-type substrate: q  s = 4.9 eV –Aluminum gate: q  m = 4.1 eV –What is flatband voltage? –Assume intrinsic silicon has q  s = 4.7 eV. What is the Fermi potential for the substrate?

ECE574 – Lecture 3 Page 7 MA/JT 1/14/03 MOS capacitor operation Assume p-type substrate (n-type will be the opposite) Three regions of operation –Accumulation (V G < 0) –Depletion (V G > 0 but small) –Inversion (V G >> 0) P-type Si substrate V B = 0 VGVG

ECE574 – Lecture 3 Page 8 MA/JT 1/14/03 Accumulation Negative voltage on gate: attracts holes in substrate towards oxide Holes “accumulate” on Si surface (surface is more strongly p-type) Electrons pushed deeper into substrate P-type Si substrate V G < 0 V B = 0 E Fp EVEV ECEC EiEi E Fm qV G

ECE574 – Lecture 3 Page 9 MA/JT 1/14/03 Depletion Positive voltage on gate: repels holes in substrate –Holes leave behind negatively charged acceptor ions Depletion region forms: devoid of carriers –Electric field directed from gate to substrate Bands bend downwards near surface –Surface becomes less strongly p-type (E F close to E i ) P-type Si substrate V G > 0 V B = 0 E Fp EVEV ECEC EiEi E Fm qV G Depletion region E ox

ECE574 – Lecture 3 Page 10 MA/JT 1/14/03 Depletion region depth Calculate thickness x d of depletion region –Find charge dQ in small slice of depletion area –Find change in surface potential to displace dQ by distance x (Poisson equation): xdxd dx dQ

ECE574 – Lecture 3 Page 11 MA/JT 1/14/03 Depletion region depth (cont.) –Integrate perpendicular to surface –Result:

ECE574 – Lecture 3 Page 12 MA/JT 1/14/03 Depletion region charge Depletion region charge density –Due only to fixed acceptor ions –Charge per unit area

ECE574 – Lecture 3 Page 13 MA/JT 1/14/03 Inversion Increase voltage on gate, bands bend more Additional minority carriers (electrons) attracted from substrate to surface –Forms “inversion layer” of electrons Surface becomes n-type P-type Si substrate V G >> 0 V B = 0 E Fp EVEV ECEC EiEi E Fm qV G electrons E ox

ECE574 – Lecture 3 Page 14 MA/JT 1/14/03 Inversion Definition of inversion –Point at which density of electrons on surface = density of holes in bulk –Surface potential is same as  F, but different sign EVEV E Fp EiEi ECEC qFqF q  S = -q  F Remember: q  F = E F - E i

ECE574 – Lecture 3 Page 15 MA/JT 1/14/03 Inversion (2) What is depletion region depth at inversion? General equation: What is  S at inversion? At inversion: This is the maximum size for depletion region

ECE574 – Lecture 3 Page 16 MA/JT 1/14/03

ECE574 – Lecture 3 Page 17 MA/JT 1/14/03 MOS transistor Add “source” and “drain” terminals to MOS capacitor Transistor types –NMOS: p-type substrate, n + source/drain –PMOS: n-type substrate, p + source/drain source drain P-substrate N+N+ N+N+ NMOS source drain N-substrate P+P+ P+P+ PMOS

ECE574 – Lecture 3 Page 18 MA/JT 1/14/03 MOS Transistor Important transistor physical characteristics –Channel length L –Channel width W –Thickness of oxide t ox L W t ox

ECE574 – Lecture 3 Page 19 MA/JT 1/14/03 MOS transistor operation Simple case: V D = V S = V B = 0 –Operates as MOS capacitor When V GS <V T0, depletion region forms –No carriers in channel to connect S and D sourcedrain P-substrate V B = 0 V g < V T0 V d =0V s =0 depletion region

ECE574 – Lecture 3 Page 20 MA/JT 1/14/03 MOS transistor operation When V GS > V T0, inversion layer forms Source and drain connected by conducting n-type layer (for NMOS) sourcedrain P-substrate V B = 0 V g > V T0 V d =0V s =0 depletion region inversion layer

ECE574 – Lecture 3 Page 21 MA/JT 1/14/03