Parallel Processing in ROSA II

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Presentation transcript:

Parallel Processing in ROSA II Glenn Schrader / Sara Siegal MIT Lincoln Laboratory 09/22/2009 Title page. This work is sponsored by the Department of the Air Force under Air Force contract FA8721-05-C-0002. Opinions, interpretations, conclusions and recommendations are those of the author and not necessarily endorsed by the United States Government.

Typical Parallel System Parallel Processing Parallel Processing Parallel Processing Inputs Corner Turn Corner Turn Output Collect In the standard parallel programming “view of the world” an application consists of processors operating on and exchanging data to solve some problem. e.g. MPI Parallel Processing “View of the World”

HPEC Within A Larger System Operator Interfaces System Controller e.g. DDS** Sensor & Controller Subsystem Interfaces HPEC System External System Interfaces In a real system a parallel processor is embedded into the system as a component. The parallel processor must interact with the other non-parallel system components in order to perform the system’s function. Other Controllers “Traditional” ROSA* II Distributed System HPEC Systems are usually a component within a larger system. The larger system tends to look more like a “distributed” system rather than a “parallel” system. *Radar Open System Architecture **Distributed Data Standard

Distributed/Parallel Approach This presentation shows results from a case where a LL developed system level middleware and another LL developed HPEC middleware were required to inter-operate Distributed / parallel component interaction can be implemented via a communication bridge Testing approach Interaction between distributed and parallel components is a communication problem Comm is typically described in terms of latency & bandwidth Tests measure round-trip latency and max bandwidth ROSA Distributed Component Distributed/Parallel Communication Bridge PVL* Parallel Components This poster presentation shows an approach that was developed at LL for connecting a parallel processor into a larger system’s command and control messaging. Some messaging performance test results will also be presented. *Parallel Vector Library