The 8051 Family Microcontroller Chin-Shiuh Shieh http://bit.kuas.edu.tw/~csshieh Department of Electronic Engineering National Kaohsiung University of Applied Sciences, Taiwan Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Microcontrollers Microprocessors, such as 8086 family, have only CCU and ALU in them. External RAM, ROM, and I/O are required. Microcontrollers, such as 8051 family, encompass CCU, ALU, RAM, ROM, and I/O in a single chip, also called single-chip. Microcontrollers have limited computational power, but their low-cost make them prevalent in consumer products and small-scale control systems. Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Microcontrollers (cont) We adopt 8051 family microcontroller in our class for its general structure and manageable system complexity. A large number of manufactures offer different variants of 8051 family microcontroller. Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan ATMEL AT89C51 AT89C51 / AT89S51 is a popular member of the 8051 family microcontroller from ATMEL. Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Features 8-bit CPU optimized for control applications 128 bytes of on-chip Data RAM, 4K bytes of on-chip Program Memory (Flash Memory/ROM) 64K Program Memory address space, 64K Data Memory address space Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Features (cont) 32 bidirectional and individually addressable I/O lines Two 16-bit timer/counters Full duplex programmable UART 6-source/5-vector interrupt structure with two priority levels Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Pin Configurations Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Pin Configurations (cont) Vcc, GND: supply voltage (5V), ground XTAL1, XTAL2: crystal connections for system clock RST: reset input EA: External Access, EA=5V to enable internal ROM. Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Pin Configurations (cont) Basic hardware configuration Power-On self reset Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Pin Configurations (cont) P0.0~P0.7: Port 0, bidirectional bit-addressable with open drain P1.0~P1.7: Port 1, bidirectional bit-addressable with internal pull-ups P2.0~P2.7: Port 2, bidirectional bit-addressable with internal pull-ups P3.0~P3.7: Port 3, bidirectional bit-addressable with internal pull-ups Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Pin Configurations (cont) Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Pin Configurations (cont) MOV P2,#0Ah ;Copy 0A16 to P2 MOV P2,#08 ;Copy 08 to P2 MOV P2,#00110100b ;Copy 3416 to P2 SETB P2.0 ;Set P2.0 to “1” CLR P2.1 ;Clear P2.1 to “0” MOV A,P1 ;Copy P1 to A JB P3.2,LOOP ;Jump to LOOP if P3.1 is “1” Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Pin Configurations (cont) P0 is open-drain SETB P0.0 ;P0.0 = high impedance CLR P0.1 ;P0.1 = 0V P1, P2, and P3 have internal pull-ups SETB P1.0 ;P1.0 = 5V CLR P1.1 ;P1.1 = 0V Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan "MOV P2,A" will turn on LEDs on P2 whose corresponding bits in A is "0". Notice that I/O port source current is limited. If an I/O port is used for input, it's output latch must set to "1". For example, "MOV P1,#0FFh", then "MOV A,P1" will read P1 status into A. MOV P1,#0FFh MOV A,P1 Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan P0 is open-drain. Pull-up resistor is required. "SETB P0.0" will turn on the relay and "CLR P0.0" will turn it off. For button applications, de-bounce circuitry and code is required (5RC=10mS~20mS). Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan ORG 0000h LOOP: SETB P2.0 LCALL DELAY CLR P2.0 LJMP LOOP DELAY: MOV R0,#0FFh L1: MOV R1,#0FFh L2: DJNZ R1,L2 ; Decrease and jump if not zero DJNZ R0,L1 RET END Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan for(R0=255;R0>=0;R0--) for(R1=255;R1>=0;R1--) { } Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan For button applications, de-bounce circuitry and code is required (5RC=10mS~20mS). Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Check Button CHECK_BUTTON: JB P3.2,CBRET ; Task for button pressed WAIT_BUTTON_RELEASE: JNB P3.2,WAIT_BUTTON_RELEASE CBRET: Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Wait Button Wait Button WAIT_BUTTON: JB P3.2,WAIT_BUTTON WAIT_RELEASE: JNB P3.2,WAIT_RELEASE RET Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Pin Configurations Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Pin Configurations (cont) Alternative Functions of Port 3 Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Polling I/O Interrupt-driven I/O Interrupt Service Subroutine Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Pin Configurations (cont) PSEN: Program Store Enable, read strobe for external program memory ALE: Address Latch Enable, for multiplexing AD0~AD7 A8~A15(P2.0~P2.7): high-byte address bus for external addressing AD0~AD7(P0.0~P0.7): multiplexed low-byte address bus and data bus for external addressing Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Memory Organization Separation of program addressing space and data addressing space. Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Program Memory Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Data Memory Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Internal Data Memory MOV 12h,#05h MOV A,3Ch MOV 0E0h,3Ch; MOV A,3Ch MOV 90h,#0Fh; MOV P1,#0Fh MOV A,R0 MOV 20h,#05h SETB 03h MOV A,20h; A==0D Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Special Function Register Map Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan MOV SBUF,#’H’ ;== MOV SBUF,#48h MOV SBUF,#’e’ Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Special Function Register Map (cont) Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Special Function Register Map (cont) MOV P2,#55h == MOV 0A0h,#55h SETB P1.0 CLR P1.0 SETB SBUF.1;Incorrect! Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Special Function Register Map (cont) MOV SBUF,A = MOV 99h,0E0h MOV 99h,A Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Special Function Registers A, (ACC): Accumulator MOV A,#02h ADD A,#03h ; ADD B,R0 incorrect! B: B Register MUL AB MOV A,#03h MOV R0,#02h MUL AB ; MUL AR0 Incorrect! DIV AB SP: Stack Pointer DPTR(DPH,DPL): Data Pointer MOV DPTR,#4000h MOVX A,@DPTR MOVX @DPTR,A Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Special Function Registers (cont) P0: Port 0 P1: Port 1 P2: Port 2 P3: Port 3 Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Special Function Registers (cont) TH0: Timer/Counter 0 High Byte TL0: Timer/Counter 0 Low Byte TH1: Timer/Counter 1 High Byte TL1: Timer/Counter 1 Low Byte SBUF: Serial Data Buffer MOV SBUF,A MOV SBUF,#’H’; Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Special Function Registers (cont) PSW: Program Status Word PCON: Power Control Register IE: Interrupt Enable Register IP: Interrupt Priority Register TCON: Timer/Counter Control Register TMOD: Timer/Counter Mode Control Register SCON: Serial Port Control Register Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

PSW: Program Status Word Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

PSW: Program Status Word (cont) SETB RS1 CLR RS0 MOV R0,#5Fh Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

PCON: Power Control Register Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

PCON: Power Control Register (cont) SETB SMOD ; Incorrect MOV A,PCON ORL A,#10000000b MOV PCON,A CLR GF0 ; Incorrect MOV A,PCON ANL A,#11111011b MOV PCON,A Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

IE: Interrupt Enable Register ; Enable External Interrupt 0 with high priority SETB EX0 SETB EA SETB PX0 Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

IP: Interrupt Priority Register Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

TCON: Timer/Counter Control Register Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

TMOD: Timer/Counter Mode Control Register Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

TMOD: Timer/Counter Mode Control Register (cont) 8-bit Auto-reload mode MOV SBUF,A MOV SBUF,B FF TH1 TL1 FD FD Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

SCON: Serial Port Control Register Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan MOV SBUF,A MOV A,SBUF MOV SBUF,#’H’ MOV SBUF,#’e’ MOV SBUF,#’l’ MOV SBUF,#’o’ Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan PC: Program Counter PC: Program Counter 16-bit register Instruction fetching Auto increase Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Interrupt Mechanism Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Pin Configurations Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Pin Configurations Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Interrupt Mechanism (cont) Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

Interrupt Mechanism (cont) Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Addressing Mode Immediate: MOV A,#20h Register: MOV A,R0 Direct: MOV A,30h Indirect: MOV A,@R0 External Data Indirect: MOVX A,@DPTR Code Indirect: MOVC A,@A+DPTR Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan MOV DPTR,#0A05Ch MOVX A,@DPTR MOVX @DPTR,A Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan MOV A,#00h ADD A,00h ADD A,01h ADD A,02h … ADD A,09h Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan int x[10]; int sum; sum=0; sum=sum+x[0]; sum=sum+x[1]; sum=sum+x[2]; … sum=sum+x[9]; Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan int x[10]; int sum; for(i=0;i<10;i++) sum=sum+x[i]; Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan MOV A,00h MOV R0,#09h LOOP: ADD A,@R0 DJNZ R0,LOOP Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan int x[10],sum; sum=sum+x[0]; sum=sum+x[1]; sum=sum+x[2]; … sum=sum+x[9]; Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan int x[10],sum,i; for(i=0i<10;i++) sum=sum+x[i]; Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Instruction Set ASEM51 v1.3 Assembler Directives ORG EQU Emulator 8051 V1.0 or JSIM-51 Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan ADD vs. ADDC Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan JB bit, rel JNB bit, rel JC rel JNC rel JZ rel ; Jump if A==0 JNZ rel Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan ADD B,R0 ANL A,#00001111b MOV A,PCON ANL A,#01111111b MOV PCON,A Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan MOV A,00h ADD A,04h MOV 08h,A MOV A,01h ADDC A,05h MOV 09h,A Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan MOV R0,#10 LOOP: … DEC R0 CJNE R0,#00, LOOP Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan JB bit, rel JNB bit, rel JC rel JNC rel JZ rel JNZ rel JB bit, rel vs. JBC bit, rel Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan ? SP DA A JMP @A+DPTR POP direct PUSH direct XCHD A, @Ri Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan RL A RLC A Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan

C.-S. Shieh, EC, KUAS, Taiwan Autumn 2013 C.-S. Shieh, EC, KUAS, Taiwan