Serial mode of data transfer In serial mode data are transferred (one bit at a time) bit by bit over a single line between peripheral and MPU.

Types transmission of serial data Synchronous, Asynchronous.

Synchronous transmission of serial data Synchronous method transfers a block of data at a time. The start and the end of the block are identified with specific bit pattern.

Asynchronous transmission of serial data Asynchronous method transfers a single byte at a time The characters can be sent at any time. Each data character has a bit to identifies its start , one or two bits to identify its end. each character is individually identified.

Bit Pattern for Asynchronous Serial Data: Diagram

Bit Pattern for Asynchronous Serial Data: Explanation When no data is being sent the signal is in a high state. The beginning of a data character is indicated by the signal going low by one bit time. This bit is called a start bit. The data bits are then sent out one after another, A parity bit can be included after data character bits for limited error checking, The end of a data character is indicated by high going signal (several high bits).

Baud Defined as number of signal changes per second, that is the rate at which the serial data is being transferred (bits per second).   Common baud rates are 300, 600, 1200, 2400, 4800, 9600 & 19200.

Bit time It is the delay between two successive bits, determined as 1/baud.  

Data communication equipment (DCE) Modems and equipments used to send serial data over long distance are known as DCE.

Data terminal equipment (DTE) The terminals and computers that are sending or receiving the serial data are referred as DTE.

8251 – Programmable communication interface 8251 is a programmable device to perform either synchronous or asynchronous serial communication , called as universal synchronous asynchronous receiver transmitter - USART.

8251: Pinout diagram

8251: Block diagram

8251: Data Transmission Signals TxD – serial bits are transmitted over this line. TxRDY – if high, indicates that the buffer register is empty and USART is ready to accept a byte. It can be used to interrupt the MPU. TxE – when high indicates that the output register is empty. TxC ⌐ (Transmitter clock) –This clock controls the rate at which characters are transmitted by USART.

8251: Data reception Signals RxD – serial bits are received over this line. RxRDY – if high, indicates that the buffer register has got a character and USART is ready to transfer it to MPU. It can be used to interrupt the MPU. RxC ⌐ (Receiver clock) –This clock controls the rate at which a character is to be received by USART.  

8251: Handshake lines DTR⌐ (output): Data terminal ready – a low on this pin indicates that the USART is ready for Tx/Rx DSR⌐ (input): Data set ready – a low on this pin informs the USART that the DCE (data communication equipment ) is ready for Tx/Rx RTS⌐ (output): Request to send – a low on this pin informs the DCE that the USART has made a request to transmit a data byte CTS⌐ (input): Clear to send – a low on this pin indicates that the DCE has signaled the USART to proceed with transmission.

Handshake signals between DTE and DCE during data transmission DTE asserts (making LOW) DTR⌐ (Data Terminal Ready) signal to DCE that it is ready. DCE asserts DSR⌐ (Data Set Ready) signal to DTE that it is also ready. DTE asserts RTS ⌐ (Request to Send) that it is ready to transfer serial data. DCE asserts CD ⌐ (Carrier Detect) and CTS ⌐ (Clear to Send) that is ready to receive serial data. Then DTE will start sending serial data to DCE through TXD. When sending serial data is finished, DTE will unassert RTS ⌐ (making HIGH) and automatically DCE unasserts CTS⌐ .

Sequence of handshake signals for data transmission

8251: Connections of USART for non-handshake The handshake lines (normally used to control a modem, while transmitting data over telephone line) have to be looped back. DTR⌐ connected back to DSR⌐ and RTS⌐ connected back to CTS⌐.

USART for non-handshake

Null Modem A Null Modem is used to connect two DTE's together. Data transmitted from the first computer must be received by the second in which TxD is connected to RxD and Vice-versa. DTR ⌐ of one computer is connected to DSR ⌐ of second one and vice-versa. Since both are in same speed, RTS ⌐ of first is connected to CTS ⌐ of second and vice-versa.

Null Modem - Diagram

8251: Registers a) Control register, b) Status register and c) Data buffer (register).

Control register It is a 16 bit register to configure the USART with a two byte control word. The lower byte – contains mode word. The upper byte – contains command word. The control register is write only register. It can be accessed when C/D ⌐ pin is high.  

Control register - Diagram

Status register The status register checks the ready status of a peripheral It is read only register. It can be accessed when C/D⌐ pin is high.  

Data Buffer (Register) This is a bi-directional (input / output) data register It can be accessed when C/D⌐ pin is low.

Access to the registers of USART Any address line from MPU can be connected to the C/D⌐ pin of USART. Usually the A0 address line is used.  

Internal address of registers Depending upon low or high signal on C/D⌐ pin of USART the internal addresses of the registers are: 0 – for data buffer, (C/D⌐ = 0), 1 – for control and status registers, (C/D⌐ = 1),  

Control word The Control Word is two bytes and consists of Command word as first byte and Mode word as the second byte.

Mode control word & format The mode word specifies the general characteristics of operation, such as, baud, parity, size of character bits, number of stop bits.

Baud rate factor It is the ratio between the frequency of clock signal applied to TxC - RxC inputs and desired baud rates.

Calculate clock frequency at TxC/RxC inputs The clock frequency at TxC/RxC inputs of USART is equal to the intended baud rate multiplied by the baud rate factor (BRF). Bit transmission / reception are synchronized with TxC/RxC clocks. Example: Clock available = 3.072 MHz. Let TxC/RxC = 3.072 MHz /10( scalar factor) = 0.3072 MHz . So, Baud rate (Bd) = 0.3072 MHz /64(BRF) = 4800.

Command control word & format The command word enables data transmission or reception.

Asynchronous transmission Transmission can be enabled by setting transmission enable bit (D0) in the command word. When transmitter is enabled and CTS⌐ =0 the transmitter is ready to transfer data on TxD line.

Asynchronous Reception Reception can be enabled by setting receive enable bit (D2) in the command instruction. The RxD line is normally high. 8251 looks for a low level on the RxD line when it receives the low level, it assumes that it is a start bit and enables an internal counter. At a count equivalent to one-half of a bit time, the RxD line is sampled again. If the line is still low, a valid START bit is detected and the 8251 proceeds to assemble the character. After successful reception of a START bit the 8251 receives data, parity, and STOP bits and then transfers the data on the receiver input register. The data is then transferred into the receiver buffer register.

Sequence of loading Mode and Command Words First the mode word is loaded into the control register: mode_cw-> A -> CR Mode word is copied into lower byte of control register, Then the command word is loaded into the control register: cmd_cw -> A -> CR Command word is copied into upper byte of control register,

Status word & format The status word provides the information of register status and transmission errors.

8251 Programming: Consist of two steps Preparation and Writing codes.

Preparation Determine necessary I/O instructions by observing whether the 8251 is memory or I/O mapped, Determine the full address of registers from the address table, Determine mode and command words from the bit pattern formats.

Writing codes: The program consists of codes for Initialization Reset USART, Configuration. Data transfer upon interrupt basis, upon polled basis (status check).

Initialization: Reset USART Bring the device to known operating condition: Send to control register Send Zero mode word and Zero command word (byte of all zero's) followed by time delay s Send Zero mode word and Reset command word (D6 =1, all other bits - zero) followed by a time delay The time delay (write-recovery time Trv) is larger than 16 T-states

Initialization: Configuration Send to control register followed by time delay mode word to specify the type of data transfer, baud rate, the character length, synchronization convention etc. command word to initialize IO transfers , activate control lines going to the IO device

Example: Codes to initialize 8251

Data transfer: Send character upon interrupt basis The TxRDY is connected to interrupt input of MPU. The transmitter and the TxRDY is enabled by putting 1 in bit D0 of the command word. When CTS⌐ is asserted low and 8251 buffer is ready for a character, the TxRDY will go high.  

Data transfer: Receive character upon interrupt basis To read character upon interrupt basis The RxRDY is connected to interrupt input of MPU. The receiver and the RxRDY is enabled by putting 1 in bit D2 of the command word. When a character is shifted into 8251 buffer, the RxRDY will go high.  

Data transfer: Send character upon polled basis To send character upon polled basis The status register is read and checked until TxRDY bit (D0) is found to be 1, D7 bit is also checked to find whether DSR⌐ input has been asserted by modem.

Codes to send character upon polled basis

Data transfer: Read character upon polled basis To read character upon polled basis The 8251 status register is read and checked until RxRDY bit (D1) is found to be 1, a character is read in from 8251 data buffer.

Codes to read character upon polled basis

RS-232 RS-232 is a standard for serial communication transmission of data. It defines the signals connecting between a DTE (data terminal equipment) such as a computer terminal, and a DCE (data circuit-terminating equipment or data communication equipment), such as a modem

MAX-232 Data received / transmitted over RXD / TXD lines of 8251 USART are at TTL logic level +5VDC. These bits are converted to RS-232 voltage levels 15VDC and negative logic by RS-232 drivers / receivers MAX-232.

Interfacing of an RS232 terminal using the 8251 USART and MAX232

Example Write program in order to initialize 8251 for the following configuration: Character length – 7 bits No parity Stop bit 2 Baud rate factor 16x Error flag reset

Solution: Mode word for the given specification:

Solution: (cont.) Command word for the transmission enable: Command word for the receive enable:

8251 Programming Solution: (cont.) Reset command word: Addresses of registers: I/O memory mapping

a) Transmit data Reset 8251 MVI A, 00h OUT FFh ; Zero mode word -> CR_addr = FFh OUT FFh ; Zero Command word -> CR_addr = FFh MVI A, 40h ; Reset Command word = 40h OUT FFh ; Reset Command word -> CR_addr = FFh

Transmission: initialization MVI A, CAh; mode word initialization OUT FFh ; mode word = CAh -> CR_addr = FFh MVI A, 11h ; Command word initialization for ; transmission OUT FFh ; Command word = 11h -> CR_addr = FFh

Mask word for status register (transmission)

Transmit data upon polling the status register (bit 0) CHECK: IN FFh ; read status register, SR -> A ANI 01h ; check TxRDY, And(A, mask_wd = 01h) JZ CHECK ; is TxRDY = 1 ? if not check again MVI A, abyte ; get the character in accumulator OUT FEh ; send character to the transmitter, ; A->DR_addr=FEh

b) Receive data Reset 8251 MVI A, 00h OUT FFh ; Zero mode word -> CR_addr = FFh OUT FFh ; Zero Command word -> CR_addr = FFh MVI A, 40h ; Reset Command word = 40h OUT FFh ; Reset Command word -> CR_addr = FFh

Recieve: initialize 8251 MVI A, CAh; mode word initialization OUT FFh ; mode word = CAh -> CR_addr = FFh MVI A, 14h ; Command word initialization to receive OUT FFh ; Command word = 14h -> CR_addr = FFh

Mask word for status register (Receive)

Receive data upon polling the status register (bit 1) CHECK: IN FFh ; read status register, SR -> A ANI 02h ; check RxRDY, And(A, mask_wd = 02h) JZ CHECK ; is RxRDY = 1 ? if not check again IN FEh ; get the character in accumulator, ; DR_addr = FEh -> A