Timing capabilities of Ultra-Fast Silicon Detector 1 A parameterization of time resolution A program to calculate Time resolution UFSD Timing capabilities.

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Presentation transcript:

Timing capabilities of Ultra-Fast Silicon Detector 1 A parameterization of time resolution A program to calculate Time resolution UFSD Timing capabilities Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop Nicolo Cartiglia With F. Cenna, F. Marchetto, A. Picerno F. Ravera, H. Sadrozinski, A. Seiden, A. Solano, A. Vinattieri, N. Spencer, A. Zatserklyaniy

UFSD: a time-tagging detector Sensor Pre-AmplifierTime measuring circuit The timing capabilities are determined by the characteristics of the signal at the output of the pre-Amplifier and by the TDC binning: 2  Total 2 =  Jitter 2 +  Time Walk 2 +  TDC 2 Time is set when the signal crosses the comparator threshold Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop

Time walk and Time jitter Time walk: the voltage value Vo is reached at different time for signal of different amplitudes Jitter : the noise is summed to the signal, causing amplitude variations Due to the physics of signal formation (see backup slides for full calculation and reduction techniques) Mostly due to electronic noise (see backup slides for capacitance and noise values used) 3 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop

A parameterization of  t 4 d:detector thickness [micron] l: pitch [micron] C: Detector capacitance [fF] Depends on the pitch and thickness N: Noise at preamp. Dominated by the voltage term S: Signal t rise : Pre-Amp Shaping time V th : Comparator threshold Depends on the noise level TDC:Width of the TDC LSB [ps] JitterTime Walk (1) l d Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop TDC

What is the best shaping time (t rise ) ? 5 To minimize time resolution: Shaping time = Collection time Note: This value also minimizes fake signals in neighboring pixels. Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop

Where to set the threshold 6 Jitter: set the threshold at the maximum derivative Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop Charge Sensitive Amplifier output Shaper Signal Shaper Derivative Time Walk: set the threshold at the minimum possible value How to minimize Time Walk and Jitter : Compromise!

State of the Art 7 Following eq. (1) Best resolution achievable: ~ 100 ps (assuming Time Walk reduction of ~ 3) Below d = 100 micron : signal too small Nicolo Cartiglia, INFN, Torino - UFSD - RD50

Sensor: Ultra-Fast Silicon Detector 8 Main point : boost the signal Minimize jitter and TW Allows for very thin detector UFSD: pixelated silicon detector with internal gain UFSD gain: Add an extra deep p+ implant Gain layer High field Nicolo Cartiglia, INFN, Torino - UFSD

Sensor: Status Nicolo Cartiglia, INFN, Torino - UFSD Presented at the 9 th Trento Workshop, 2014 Genova Measured Gain: 2-10

Sensor: Simulation 10 Nicolo Cartiglia, INFN, Torino - UFSD We developed a full sensor simulation (WeightField2, F. Cenna, 9 th Trento workshop) avalilable at It includes: Custom Geometry Calculation of drift field and weighting field Currents signal via Ramo’s Theorem Gain Diffusion Temperature effect Non-uniform charge deposition Electronics

WeightField2: a program to simulate silicon detectors 11 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop

WeightField2: a program to simulate silicon detectors 12 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop

WeightField2: a program to simulate silicon detectors 13 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop

WeightField2: a program to simulate silicon detectors 14 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop

WeightField2: a program to simulate silicon detectors 15 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop

WeightField2: a program to simulate silicon detectors 16 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop

Aside: Non-Uniform Energy deposition 17 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop 5  m We have created, using GEANT4, a library of the energy depositions of a MIP in silicon, every 5 micron. Using this library, we can predict the value in any thickness 5 micron 0.027ln(d) Comparison with the measurement presented in 2011 JINST 6 P06013 S. Meroli, D. Passeri and L. Servoli 11 JINST 6 P06013

Time walk Signals cross a given threshold with a delay that depends on their amplitude, on the rise time and on the value of the threshold: t delay Time walk has 2 different source: 1.Amplitude variation (Landau distributed) 2.Non-uniformity charge deposition 18 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop Bumps: Due to non-uniformity

Comparison Data-Simulation 19 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop MIPAlpha from TopAlpha from bottom

Comparison Data Simulation 20 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop MIPAlpha from TopAlpha from bottom

Simulation prediction 21 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop Using Weightfield we are able to simulate many geometries, and to predict the timing capabilities of UFSD. NOTE: We simulate the value of TimeWalk without any correction. Constant Fraction Discriminator and Time-Over-Threshold circuits are able to reduce this component by a large fraction (3-10)

UFSD – Timing Capability 22 TW ~ 200 ps Jitter ~ 85 ps Sensor Thickness [  m] Pixel size [  m] Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop Blue = NA62 UFSD with Gain = 10 TW ~ 130 ps Jitter ~ 30 ps TW ~ 110 ps Jitter ~ 30 ps TW ~ 50 ps Jitter ~ 20 ps TW ~ 120 ps Jitter ~ 15 ps TW ~ 110 ps Jitter ~ 20 ps TW ~ 80 ps Jitter ~ 25 ps

UFSD – Summary 23 Nicolo Cartiglia, INFN, Torino - UFSD - 9th Trento Workshop We are just starting to understand the timing capability of UFSD The internal gain of UFSD makes them ideal for accurate timing studies We developed a program, Weightfield2.0, that is able to reproduce accurately the output response of UFSD (available at Many geometries allow for small jitter (~20 ps) and TimeWalk (~ 100 ps) 10 ps looks really difficult, 20 ps looks 1/4 as difficult, 30 ps 1/9 …

References 24 Nicolo Cartiglia, INFN, Torino - UFSD Several talks at the 22 nd and 23 rd RD50 Workshops: 23 rd RD50: 22 nd RD50: 9 Th Trento Workshop, Genova, Feb F. Cenna “ Simulation of Ultra-Fast Silicon Detectors” N. Cartiglia “ Timing capabilities of Ultra-Fast Silicon Detector ” Papers: [1] N. Cartiglia, Ultra-Fast Silicon Detector, 13th Topical Seminar on Innovative Particle and Radiation Detectors (IPRD13), 2014 JINST 9 C02001, [2] H. Sadrozinski, N. Cartiglia et al., Ultra-fast Silicon Detectors, NIM-A, RESMDD12 proceeding (2012), Firenze,