CS section activities Industrial controls Luca Arnaudon David Glenat David Landre Slawomir Totos Ruben Lorenzo-Ortega Digital hardware John Molendijk.

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Presentation transcript:

CS section activities Industrial controls Luca Arnaudon David Glenat David Landre Slawomir Totos Ruben Lorenzo-Ortega Digital hardware John Molendijk Jerome Simonin Software Andy Butterworth Frederic Dubouchet Michael Jaussi Anthony Rey Andrey Pashnin Yannick Le Borgne (OP) PLC controls + associated hardware & software dev mainly for RF power systems Graphical interface software (LabVIEW, Inspector…) Digital design mainly for LLRF systems in collaboration with FB section Front-end software (FESA) for LLRF and power systems Expert applications (Java…) Tools for firmware and software development

SPS RF controls renovation SL-Note RF MIL1553 fieldbus “PCA”

ECA SiemensECA Philips Cavity Controller New PLC cavity controllers for 200 MHz (Simatic replacement) New PLC amplifier controls interface (Tx ECA replacement) ‒Siemens ‒Philips New PLC cavity controllers for 800 MHz ‒including hybrid interlocks and controls interface towards new IOT amplifiers SPS RF controls renovation Luca, Slawek

SPS RF controls renovation Replacement of NIM hardware by VME – Dynamic Trigger Unit  VME Trigger Unit – Pulse generators, phase shifters, B-train counter – … New VME function generator boards New PLC controls for – phase pickups signal switching and attenuation – alarm concentration & display New front-end software under FESA + LSA

New SPS RF MMI GUI configures itself to parameter type without writing a line of java code

New SPS RF MMI Real time check that FESA parameter and LSA parameter are synchronised. indicate which value has to be verified Yannick Read and display the fault properties defined in some FESA classes

New SPS RF MMI Help and bug report module: Automatic analysis of problems report A solution can be proposed by the program Yannick

New SPS frequency program Based on LHC & Linac4 hardware PPM multi-cycling New firmware + DSP code + FESA software development Andrey + FB Rephasing!

Linac4 RF controls All klystron control racks installed FESA software running for RFQ Access & Beam Interlock PLCs installed Controls for RFQ RF power system Java application software panels built using “Inspector” Testing using mobile measurement stand

Linac4 H- source RF for RF signal generation… …and acquisition VME based system installed…

PSB LLRF PSB digital LLRF system fully integrated in the 864 test lab John, Jerome, Michael

AD stochastic cooling Old power supplies New power supplies (1 per amplifier) Old motor New stepping motors Pickup & kicker movementRF amplifier power supplies New control crate Amplifiers David, Ruben, Luca

Firmware/software development tools “Cheburashka” memory map editor Also generates: Linux device driver VHDL for FPGA firmware DSP C language header files Web documentation Code and config file generation Automatic generation of FESA 2.10 and FESA 3 classes Consistent definition of memory map between firmware, driver & FESA class Standardization of commonly used features Linac4 commissioning means rapid firmware/software development cycles Average production time for driver, Controls DB declaration and Fesa class deployment is 2-3 hours! Specific requests still handled by software developer and takes a bit longer but full access to registers and memories is provided. Anthony ++

LHC All PowerPC/LynxOS will be replaced by Intel/Linux in LHC by end of LS1 All FESA software ported from LynxOS to Linux Now we just have 130 FESA classes to migrate to FESA 3… Fred ++

OpenDays Point 4 RF cavities in LSS4 UX45 cavern The Super Plastic Synchrotron A great success: 2265 visitors underground over Saturday/Sunday 107 volunteers (thank you to all who helped!)