1. CDA 4253 FPGA System Design Final Project Hao Zheng Comp Sci & Eng U of South Florida 1

2. Final Project Idea − 1 Implement and test a sort algorithm on FPGA boards. – Unsorted data are stored in Block RAMs. – Initialization of the Block RAMs should be done through an external file. – After the sorting is finished, the sorted data are displayed in a terminal on the host system through a UART transmitter (study Chapter 7 about UART interface). 2

3. Final Project Idea − 1 3 Sort din N sort_done addr k we sort_start Memory N dout UART TX din addr Ctrl uart_start uart_done uart interface

4. Final Project Idea − 1: Specific Requirements Data inputs are unsigned and 16-bit wide. Data inputs are defined in hexadecimal format in an external file to initialize the block RAM. The minimal size of data inputs should be >= 16. The sorted results displayed on the terminal through UART are also in hexadecimal format. Your design should support the selection of sorting in an either increasing or decreasing order. 4

5. Final Project Idea − 2 Study and use the Integrated Logic Analyzer (ILA) for debugging designs. – ILA is a hardware component that can capture hardware traces while the a target system is executing. – The captured HW traces can be viewed as waveform for debugging. Objective: – Get familiar with ILA, – know how to use it to debug an FPGA implement with defects. 5

6. Final Project Idea − 2 At the end, – Demonstrate by fixing a buggy design, – Submit a report detailing the entire process of using ILA to fix the bugs. Documents: – Vivado Design Suite Tutorial: Programming and Debugging (UG936) – Vivado Design Suite User Guide: Programming and Debugging (UG908) – Integrated Logic Analyzer v5.0 (PG172) 6

7. Final Project Management Each team has up to two members. – Make sure you find a partner you can work with. – Both team members get the same project grade. Project Review – Each team schedules a project review in the final/final exam week. – Demonstration the successful completion of the chosen project. Your design may be required to re- configured on-site to verify its correctness. – A written report is due at the end of review. 7