Presentation is loading. Please wait.

Presentation is loading. Please wait.

March 2005 1R. Smith - University of St Thomas - Minnesota ENGR 330: Today’s Class Connecting Hardware to InstructionsConnecting Hardware to Instructions.

Similar presentations


Presentation on theme: "March 2005 1R. Smith - University of St Thomas - Minnesota ENGR 330: Today’s Class Connecting Hardware to InstructionsConnecting Hardware to Instructions."— Presentation transcript:

1 March 2005 1R. Smith - University of St Thomas - Minnesota ENGR 330: Today’s Class Connecting Hardware to InstructionsConnecting Hardware to Instructions A bunch of diagramsA bunch of diagrams Assembly language programmingAssembly language programming Homework assignmentHomework assignment Note: this presentation includes copyrighted material of McGraw-Hill, the textbook publisher, and is intended for the exclusive use of ENGR 330 at UST (Fall 2007). Some slides are based on slides from NC State University, Introduction to Computer Organization (ECE 206) course, and from UC Riverside’s CS 061, a lower division computer science and engineering course.Note: this presentation includes copyrighted material of McGraw-Hill, the textbook publisher, and is intended for the exclusive use of ENGR 330 at UST (Fall 2007). Some slides are based on slides from NC State University, Introduction to Computer Organization (ECE 206) course, and from UC Riverside’s CS 061, a lower division computer science and engineering course.

2 March 2005 2R. Smith - University of St Thomas - Minnesota The von Neumann Model   Memory: holds both data and instructions   Processing Unit: carries out the instructions   Control Unit: sequences and interprets instructions   Input: external information into the memory   Output: produces results for the user Memory Processing Unit Input Output MARMDR ALUTEMP Control Unit PCIR (keyboard) (monitor)

3 March 2005 3R. Smith - University of St Thomas - Minnesota The LC-3 as a von Neumann machine Control unitControl unit –PC and its inputs –IR feeds the FSM –FSM’s combinatorial logic feeds the rest ALU/ProcessingALU/Processing –Register file –MUX to feed ALU Grand BusGrand Bus –RAM access –ALU to Registers Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display.

4 March 2005 4R. Smith - University of St Thomas - Minnesota The Instruction Cycle as FSM

5 March 2005 5R. Smith - University of St Thomas - Minnesota LD data path LD R2, x1AF

6 March 2005 6R. Smith - University of St Thomas - Minnesota LD (PC-Relative)

7 March 2005 7R. Smith - University of St Thomas - Minnesota LDR (Base+Offset)

8 March 2005 8R. Smith - University of St Thomas - Minnesota LEA (Immediate)

9 March 2005 9R. Smith - University of St Thomas - Minnesota LEA data path LEA R5, # -3

10 March 2005 10R. Smith - University of St Thomas - Minnesota ST (PC-Relative)

11 March 2005 11R. Smith - University of St Thomas - Minnesota STR (Base+Offset)

12 March 2005 12R. Smith - University of St Thomas - Minnesota ADD/AND (Immediate) Note: Immediate field is sign- extended. this one means “immediate mode”

13 March 2005 13R. Smith - University of St Thomas - Minnesota ADD/AND (Register) this zero means “register mode”

14 March 2005 14R. Smith - University of St Thomas - Minnesota ADD Immediate data path ADD R1, R4, # -2

15 March 2005 15R. Smith - University of St Thomas - Minnesota NOT (Register) Note: Src and Dst could be the same register.

16 March 2005 16R. Smith - University of St Thomas - Minnesota NOT data path NOT R3, R5

17 March 2005 17R. Smith - University of St Thomas - Minnesota BR (PC-Relative) What happens if bits [11:9] are all zero? All one?

18 March 2005 18R. Smith - University of St Thomas - Minnesota BR data path BR data path BRz x0D9

19 March 2005 19R. Smith - University of St Thomas - Minnesota JMP (Register) Jump is an unconditional branch -- always taken.Jump is an unconditional branch -- always taken. –Target address is the contents of a register. –Allows any target address.

20 March 2005 20R. Smith - University of St Thomas - Minnesota LC-3 Data Path –Global Bus 16-bit, data & address16-bit, data & address connects all componentsconnects all components is shared by allis shared by all –Memory Memory Address Register: MARMemory Address Register: MAR –address of location to be accessed Memory Data Register: MDRMemory Data Register: MDR –data loaded or to be stored Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display.

21 March 2005 21R. Smith - University of St Thomas - Minnesota Using Operate Instructions With only ADD, AND, NOT…With only ADD, AND, NOT… –How do we subtract? –How do we OR? –How do we copy from one register to another? –How do we initialize a register to zero?

22 March 2005 22R. Smith - University of St Thomas - Minnesota Assembly language programming All the power of machine languageAll the power of machine language Less hassleLess hassle LC-3 assembler/simulatorLC-3 assembler/simulator –Link on the course home page –Download it to use for the assignment Sample problemSample problem –A list of numbers in RAM – add them up


Download ppt "March 2005 1R. Smith - University of St Thomas - Minnesota ENGR 330: Today’s Class Connecting Hardware to InstructionsConnecting Hardware to Instructions."

Similar presentations


Ads by Google