3Control InstructionsUsed to alter the sequence of instructions (by changing the Program Counter)Conditional Branchbranch is taken if a specified condition is truesigned offset is added to PC to yield new PCelse, the branch is not takenPC is not changed, points to the next sequential instructionUnconditional Branch (or Jump)always changes the PCTRAPchanges PC to the address of an OS “service routine”routine will return control to the next instruction (after TRAP)
4Condition CodesLC-3 has three condition code registers: N -- negative Z -- zero P -- positive (greater than zero)Set by any instruction that writes a value to a register (ADD, AND, NOT, LD, LDR, LDI, LEA)Exactly one will be set at all timesBased on the last instruction that altered a register
5Branch Instruction Branch specifies one or more condition codes. If the set bit is specified, the branch is taken.PC-relative addressing: target address is made by adding signed offset (IR[8:0]) to current PC.Note: PC has already been incremented by FETCH stage.Note: Target must be within 256 words of BR instruction.If the branch is not taken, the next sequential instruction is executed.
6BR (PC-Relative) What happens if bits [11:9] are all zero? All one? If all zero, no CC is tested, so branch is never taken. (See Appendix B.)If all one, then all are tested. Since at least one of the CC bits is set to one after each operate/load instruction, then branch is always taken. (Assumes some instruction has set CC before branch instruction, otherwise undefined.)What happens if bits [11:9] are all zero? All one?
7Example from last class: Multiply value stored in R2 by 15 ; initialize ; R0 <- R0 AND ; R1 <- R1 AND 0 ; code to repeat ; R1 <- R1 + R ; R0 <- R0 + 1 ; set condition codes ; R3 <- R0 – 15 ; branch if R3 < 0 because count < ; PC<- PC- 4 if n==1R0 <- R0 AND 0R1 <- R1 AND 0R1 <- R1 + R2R0 <- R0 + 1R3 <- R0 -15trueR3 < 0?n==1false
8Refined Example: a better way to count ; initialize ; R0 <- R0 AND ; R1 <- R1 AND ; R0 <- R ; code to repeat ; R1 <- R1 + R ; R0 <- R0 - 1 ; set condition codes ; R3 <- R0 – 15 ; branch if R0 >0 because count < ; PC<- PC- 3 if p==1R0 <- R0 AND 0R1 <- R1 AND 0R0 <- R0 + 15R1 <- R1 + R2R0 <- R0 -1trueR0 > 0?p==1false
10Multiply Using the While Loop Structure R0 <- R0 AND 0; initialize ; R0 <- R0 AND ; R1 <- R1 AND ; R0 <- R ; branch if R0== 0 because count == ; PC<- PC+3 if z==1 ; code to repeat ; R1 <- R1 + R ; R0 <- R0 - 1 ; branch unconditionally ; PC<- PC-4R1 <- R1 AND 0R0 <- R0 + 15trueR0 == 0?z==1falseR1 <- R1 + R2R0 <- R0 -1alwaystruetruefalse
11Unconditional branch to retest condition Code for IterationPC offset toaddress CExact bits dependon conditionbeing testedtruefalseUnconditional branch to retest conditionPC offset to address AAssumes all addresses are close enough that PC-relative branch can be used.
13WRONG??? If conditional Problem statement: Increment R0 if R0 < R1 R0 <- NOT R0; form 2s complement of R ; R0 <- NOT R ; R0 <- R0 + 1 ; R3 <- R1 + complement of R ; R3 <- R0 + R1 ; branch if R3 is neg or ; PC<- PC+1 if z==1 or n==1 ; increment R ; haltR0 <- R0 + 1R3 <- R0 + R1truez==1R3 <= 0?n==1falseR0 <- R0 +1false
14Analyze the SituationGoal: Increment R0 if R0 < R1 R0 and R1 can each be positive or negative So increment R0 if (R1-R0) is positive and branch to skip that step if (R1-R0) is zero or negativewhen we don’t want to increment ->we do want to branchAssume R0 >= R1result of (R1-R0)R0 is pos & R1 is poszero or negR0 is pos & R1 is negnegR0 is neg & R1 is pos NAposR0 is neg & R1 is negzero, neg
15If conditional (CORRECTED) Problem statement: Increment R0 if R0 < R1; form 2s complement of R0 & store in R ; R4 <- NOT R ; R4 <- R4 + 1 ; R3 <- R1 + complement of R0 (stored in R4) ; R3 <- R4 + R1 ; branch if R3 is neg or ; PC<- PC+1 if z==1 or n==1 ; increment R ; R0 <- R ; haltR0 <- NOT R0R0 <- R0 + 1R3 <- R0 + R1trueR3 <= 0?z==1n==1falseR0 <- R0 +1false
16Unconditional branch to Next Subtask Code for ConditionalPC offset to address CExact bits dependon conditionbeing testedUnconditional branch to Next SubtaskPC offset to address DAssumes all addresses are close enough that PC-relative branch can be used.
17JMP (Register) Jump is an unconditional branch -- always taken. Target address is the contents of a register.Allows any target address.
18TRAP Calls a service routine, identified by 8-bit “trap vector.” When routine is done, PC is set to the instruction following TRAP.(We’ll talk about how this works later.)vectorroutinex23input a character from the keyboard (IN)x21output a character to the monitor (OUT)x25halt the program (HALT)Warning: TRAP changes R7.