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Chapter 5 The LC-3. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 4-2.

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Presentation on theme: "Chapter 5 The LC-3. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 4-2."— Presentation transcript:

1 Chapter 5 The LC-3

2 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 4-2

3 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 5-3 Control Instructions Used to alter the sequence of instructions (by changing the Program Counter) Conditional Branch branch is taken if a specified condition is true  signed offset is added to PC to yield new PC else, the branch is not taken  PC is not changed, points to the next sequential instruction Unconditional Branch (or Jump) always changes the PC TRAP changes PC to the address of an OS “service routine” routine will return control to the next instruction (after TRAP)

4 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 5-4 Condition Codes LC-3 has three condition code registers: N -- negative Z -- zero P -- positive (greater than zero) Set by any instruction that writes a value to a register (ADD, AND, NOT, LD, LDR, LDI, LEA) Exactly one will be set at all times Based on the last instruction that altered a register

5 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 5-5 Branch Instruction Branch specifies one or more condition codes. If the set bit is specified, the branch is taken. PC-relative addressing: target address is made by adding signed offset (IR[8:0]) to current PC. Note: PC has already been incremented by FETCH stage. Note: Target must be within 256 words of BR instruction. If the branch is not taken, the next sequential instruction is executed.

6 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 5-6 BR (PC-Relative) What happens if bits [11:9] are all zero? All one?

7 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Example from last class: Multiply value stored in R2 by 15 ; initialize 0101 000 000 1 00000 ; R0 <- R0 AND 0 0101 001 001 1 00000 ; R1 <- R1 AND 0 ; code to repeat 0001 001 001 000 010 ; R1 <- R1 + R2 0001 000 000 1 00001 ; R0 <- R0 + 1 ; set condition codes 0001 011 000 1 10001 ; R3 <- R0 – 15 ; branch if R3 < 0 because count < 15 0000 100 111111100 ; PC<- PC- 4 if n==1 5-7 R0 <- R0 AND 0 R1 <- R1 AND 0 R1 <- R1 + R2 R0 <- R0 + 1 R3 <- R0 -15 R3 < 0? true n==1 false

8 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Refined Example: a better way to count ; initialize 0101 000 000 1 00000 ; R0 <- R0 AND 0 0101 001 001 1 00000 ; R1 <- R1 AND 0 0001 000 000 1 01111 ; R0 <- R0 + 15 ; code to repeat 0001 001 001 000 010 ; R1 <- R1 + R2 0001 000 000 1 11111 ; R0 <- R0 - 1 ; set condition codes 0001 011 000 1 10001 ; R3 <- R0 – 15 ; branch if R0 >0 because count < 15 0000 001 111111101 ; PC<- PC- 3 if p==1 5-8 R0 <- R0 AND 0 R1 <- R1 AND 0 R0 <- R0 + 15 R1 <- R1 + R2 R0 <- R0 -1 R0 > 0? true p==1 false

9 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Iterative 5-9 While Loop Do-While Loop true false

10 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Multiply Using the While Loop Structure ; initialize 0101 000 000 1 00000 ; R0 <- R0 AND 0 0101 001 001 1 00000 ; R1 <- R1 AND 0 0001 000 000 1 01111 ; R0 <- R0 + 15 ; branch if R0== 0 because count == 15 0000 010 000000011 ; PC<- PC+3 if z==1 ; code to repeat 0001 001 001 000 010 ; R1 <- R1 + R2 0001 000 000 1 11111 ; R0 <- R0 - 1 ; branch unconditionally 0000 111 111111100 ; PC<- PC-4 5-10 R0 <- R0 AND 0 R1 <- R1 AND 0 R0 <- R0 + 15 R1 <- R1 + R2 R0 <- R0 -1 always true false R0 == 0? true z==1 false true

11 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 6-11 Code for Iteration Exact bits depend on condition being tested PC offset to address C PC offset to address A Unconditional branch to retest condition Assumes all addresses are close enough that PC-relative branch can be used. true false

12 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Conditional 5-12 IfIf-Else "hammock""diamond"

13 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. If conditional ; form 2s complement of R0 1001 000 000 111111 ; R0 <- NOT R0 0001 000 000 1 00001 ; R0 <- R0 + 1 ; R3 <- R1 + complement of R0 0001 011 000 000 001 ; R3 <- R0 + R1 ; branch if R3 is neg or 0 0000 110 000000001 ; PC<- PC+1 if z==1 or n==1 ; increment R0 0001 000 000 1 00001 ; R0 <- R0 + 1 1111000000100101 ; halt 5-13 R0 <- NOT R0 R0 <- R0 + 1 R3 <- R0 + R1 R0 <- R0 +1 false R3 <= 0? true z==1 false Problem statement: Increment R0 if R0 < R1 n==1 WRONG???

14 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. Analyze the Situation Goal: Increment R0 if R0 < R1 R0 and R1 can each be positive or negative So  increment R0 if (R1-R0) is positive and branch to skip that step if (R1-R0) is zero or negative 5-14 Assume R0 >= R1 result of ( R1-R0 ) R0 is pos & R1 is poszero or neg R0 is pos & R1 is negneg R0 is neg & R1 is pos NApos R0 is neg & R1 is negzero, neg when we don’t want to increment -> we do want to branch

15 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. If conditional (CORRECTED) ; form 2s complement of R0 & store in R4 1001 100 000 111111 ; R4 <- NOT R0 0001 100 100 1 00001 ; R4 <- R4 + 1 ; R3 <- R1 + complement of R0 (stored in R4) 0001 011 100 000 001 ; R3 <- R4 + R1 ; branch if R3 is neg or 0 0000 110 000000001 ; PC<- PC+1 if z==1 or n==1 ; increment R0 0001 000 000 1 00001 ; R0 <- R0 + 1 1111000000100101 ; halt 5-15 R0 <- NOT R0 R0 <- R0 + 1 R3 <- R0 + R1 R0 <- R0 +1 false R3 <= 0? true z==1 false Problem statement: Increment R0 if R0 < R1 n==1

16 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 6-16 Code for Conditional Exact bits depend on condition being tested PC offset to address C PC offset to address D Unconditional branch to Next Subtask Assumes all addresses are close enough that PC-relative branch can be used.

17 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 5-17 JMP (Register) Jump is an unconditional branch -- always taken. Target address is the contents of a register. Allows any target address.

18 Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 5-18 TRAP Calls a service routine, identified by 8-bit “trap vector.” When routine is done, PC is set to the instruction following TRAP. (We’ll talk about how this works later.) vectorroutine x23input a character from the keyboard (IN) x21output a character to the monitor (OUT) x25halt the program (HALT) Warning: TRAP changes R7.


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