1. EE/CS 480/481 12/12/2016 11:16:40 PM University of Portland School of Engineering Project Yew Inline Power Monitor with Cost Analysis Team Zubin Bagai Kevin Eldrige Jon Worley Advisor Dr. Robert Albright Dr. Peter Osterberg Industry Representative Mr. John M. Haner, B.P.A.

2. EE/CS 480/481 2 University of Portland School of Engineering Overview Introduction Functional Diagrams Scorecard Additional Accomplishments Plans Issues/Concerns Conclusions 2/12/2016 11:16:40 PM

3. EE/CS 480/481 3 University of Portland School of Engineering Introduction 2/12/2016 11:16:40 PM Top Level Functional Block Diagram Component Level Block Diagram

4. EE/CS 480/481 4 Power Sensing Functional Diagram 2/12/2016 University of Portland School of Engineering

5. EE/CS 480/481 5 2/12/2016 University of Portland School of Engineering PIC Functional Diagram

6. EE/CS 480/481 6 MOSIS Functional Diagram 2/12/2016 University of Portland School of Engineering

7. EE/CS 480/481 72/12/2016 University of Portland School of Engineering Power Sense Solder Board Layout

8. EE/CS 480/481 8 University of Portland School of Engineering Scorecard Completed CPLD burning and Testing Made power sensing circuit 2/12/2016 11:16:40 PM Completed

9. EE/CS 480/481 9 Additional Accomplishments Received all parts necessary to build our device 2/12/2016 University of Portland School of Engineering

10. EE/CS 480/481 10 University of Portland School of Engineering Plans Finish building PIC Start integrating all components together Test entire circuit 2/12/2016 11:16:40 PM

11. EE/CS 480/481 11 University of Portland School of Engineering Milestones 2/12/2016 11:16:40 PM NumberDescriptionOriginal 15 Sept 09 Previous 01 Dec 09 Present 26 Jan 10 19Power Sensor Circuits Built1/26/10N/A1/26/10 20January Program Review1/26/10N/A1/26/10 21CPLD Programmed and Tested1/31/10N/A1/26/10 22Test Power Sensor with CPLD2/6/10N/A2/6/10 23PIC Programmed and Tested2/12/10N/A2/12/10 24February Program Review2/23/10N/A2/23/10 25System Integration Complete2/26/10N/A2/26/10 26Finish System Testing with CPLD(s)3/5/10N/A3/5/10 27Spring Break3/8/10N/A3/8/10

12. EE/CS 480/481 12 University of Portland School of Engineering Concerns/Issues Scheduling meetings may be a problem due to absences and busy team Solution: Rearrange parts of our schedule so that productivity doesn’t stop 2/12/2016 11:16:40 PM

13. EE/CS 480/481 13 University of Portland School of Engineering Conclusions Project Yew is an Inline Power Monitor Team Yew met the January deadlines CPLD was built and tested Sensor circuit is built, will be tested PIC is our next target Questions? 2/12/2016 11:16:40 PM