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Reconfigurable Computing: CHALLENGES João M. P. Cardoso The High Level Conference on Nanotechnologies, Braga, Portugal, 20 November 2007 Portugal Pedro.

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Presentation on theme: "Reconfigurable Computing: CHALLENGES João M. P. Cardoso The High Level Conference on Nanotechnologies, Braga, Portugal, 20 November 2007 Portugal Pedro."— Presentation transcript:

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2 Reconfigurable Computing: CHALLENGES João M. P. Cardoso The High Level Conference on Nanotechnologies, Braga, Portugal, 20 November 2007 Portugal Pedro C. Diniz

3 2 Outline  Reconfigurable Computing  Challenges  Role of Reconfigurable Technologies in Future Execution Environments  Overall Actions

4 3 Reconfigurable (Custom) Computing  Hardware resources can be “configured” to a specific architecture Specialized Functional Elements and Processing Elements Interconnect between “Nodes” Custom to Data flow in the application Configurable on-chip memories (size, data- width, indexing) Execution Models (Pipelined, Multithreading, VLIW) all possible in the same reconfigurable fabric

5 4 Reconfigurable (customizable) Fabrics Customized memories Customized interconnects Customized F(a,b,c,d)

6 5 Reconfigurable (customizable) Fabrics

7 6 Reconfigurable (Custom) Computing  Orders of magnitude of speed-up over traditional computing systems  When? Customization is the key: High operation- and task-level parallelism Increased by storage organization (data replication/distribution over multiple on-chip memories) Non-Standard Numeric Formats (fixed- point, etc.) Custom Routing

8 7 Are Architectures Merging? Multi-(Many)-core vs. Reconfigurable Multicore Manycore Reconfigurable Fabrics  Regularity of Reconfigurable Fabrics (e.g., FPGAs) allow them to ride Moore Law Unbelievable large number of devices Hard-macro cores can be plugged-in

9 8 Configurable logic Configurable memory  Data travel on paths statically or dynamically defined  Many on-chip Memories Reconfigurable Computing: Execution Models

10 9 Reconfigurable Computing: Managing Data Availability  Many on-chip Memories Each Array May be accessed in Parallel  Custom Pipelining On-chip configurable memories can be adapted to communication needs  Replication Increases Data Availability By writing to memories in Tandem using a customized bus

11 10 Reconfigurable (Custom) Computing  Benefits: Reconfiguration is ideal for fast prototyping and early evaluation of realistic performance Performance Tolerate Defects  Costs: Added complexity of execution models makes programming very hard (we have not yet solved the parallel programming problem yet, sort of…)

12 11 Reconfigurable Computing Based on source: Bezdek, J.C, Fuzzy models - what are they, and why, IEEE Trans. on Fuzzy Systems, 1993. Reconfigurable Computing has already achieved this point! Many companies: Cray, SGI, SRC, ARC, PACT, PicoChip, Tilera, etc.

13 12 Reconfigurable Computing  The Sony PSP Example Reconfigurable Architecture: Virtual Mobile Engine (VME): audio 24-bit data width 166 MHz Single-cycle context switch http://www.hotchips.org/archives/hc16/3_Tue/8_HC16_Sess8_Pres1_bw.pdf

14 13 Reconfigurable Computing  The Sony PSP Example Reconfigurable Architecture: Virtual Mobile Engine (VME): audio 24-bit data width 166 MHz Single-cycle context switch http://www.hotchips.org/archives/hc16/3_Tue/8_HC16_Sess8_Pres1_bw.pdf

15 Challenges

16 15 Application Code Reconfigurable Architectures and Execution Models Compilation, Synthesis and Optimization  Years of efforts on parallelizing compilers yielded meager returns on the potential for concurrent execution  Movement in industry for new concurrent programming paradigms and languages (upc, X-10, Fortress, etc.) Programming Showstopper: Programming is excruciatingly painful… How to make devices like FPGAs easily programmable is a hard research problem, still.

17 16 Application Code Reconfigurable Architectures and Execution Models Compilation, Synthesis and Optimization Programming  Future reconfigurable architectures will exacerbate all the programming problems  Issues: How can programming languages help the compiler? How can architectures help the compiler and tools?

18 17 What is needed? Success of Multicore Advances in Computer Architecture Advances in Programming Languages Advances in Compilers Advances in Tools The Looming Software Crisis due to the MULTICORE Menace Saman Amarasinghe, MIT

19 18 What is needed? Success of Reconfigurable Computing Advances in Computer Architecture Advances in Programming Languages Advances in Compilers Advances in Tools

20 19 What is needed? Advances in Computer Architecture Advances in Tools Advances in Compilers Advances in Programming Languages Success of Reconfigurable Computing

21 Role of Reconfigurable Technologies in Future Execution Environments

22 21 Unreliable computing machines, crummy components Fault-tolerance Nanotechnology Tolerate imperfection Defect-tolerance Self-diagnosis Reliable computing machines Integrated Circuit Assume no imperfection Unreliable computing machines Vacuum-tubes, relays John von-Neumann, Claude Shannon Redundancy to deal with failures Deal with imperfection Technology Key Technology Based on Robinett et al., “Computing with a Trillion Crummy Components,” COMMUNICATIONS OF ACM, Sept. 2007 2015’s? 1960’s 1950’s

23 22 8086 286 386 486 Pentium P2 P3 P4 Itanium Itanium 2 1,000,000,000 100,000 10,000 1,000,000 10,000,000 100,000,000 From Hennessy and Patterson, Computer Architecture: A Quantitative Approach, 4th edition, 2006 Based on a slide by Saman Amarasinghe, MIT Number of Transistors All major manufacturers moving to multicore architectures Technology  Uniprocessor Performance (SPECint) Nanotechnology may impose a step to Reconfigurable Computing! Understandable first step

24 23 Technology  Success of memories Scalable, highly regular structures New cells not working do not compromise chip, reduce size  Reconfigurable computing architectures Matrix oriented Similar scalable, regular structures Cells not working do not compromise chip, reduces number of available resources

25 24 Nanotechnology and Reconfigurable Computing: a perfect match?  Future computer substrates of nanotechnology-based devices likely have structure similar to current reconfigurable architectures  Implication: Most solutions to reconfigurable computing are likely to be applicable to nanotechnology  Issues exacerbated by unreliability Tools should reconfigure architectural layer based on defects/faults Nanoarray proposed by Andre DeHon, 2002

26 25 Future Nanofabrics: Exploiting Reconfigurability?  Changing Application Requirements Input Application can have widely varying requirements First handling some touch-pad interaction, next doing video processing Real-time versus off-line needs. Unreliable Computing substrates Defects/Faults  Comments No killer-app still for reconfigurability, despite 10+ years of searching Emerging substrates might prove to be a key ground for reconfiguration as either: Cost of detection and correction of faults is simply too high The environment is inherently unreliable

27 26 Future Nanofabrics: Programming for Reconfigurability?  No Clear Good Approach Today  Programming Languages and Environments: Too Rigid Change and Failures are never a first class citizen Shall we expose some (but not all!) aspects of recovery to the programmer? Some times failures might not be critical Need to offer a system with graceful performance degradation

28 27 Nanotechnology and Reconfigurable Computing  We have been here before! (a déjà vu) Success of Reconfigurable Computing

29 28 Overall Actions  We are at an unique opportunity in time New comers in the game do not need to go through all the steps of the ladder  Opportunity for EU to take the leadership  Key investments (joint efforts on) Advances in Computer Architecture Advances in Programming Languages Advances in Compilers Advances in Tools

30 29 Thank You!  João M. P. Cardoso jmpc@acm.org http://prosys.inesc-id.pt/~jmpc


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